drm/msm/dpu: get rid of DPU_WB_INPUT_CTRL
authorDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Thu, 22 May 2025 19:03:44 +0000 (22:03 +0300)
committerDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Fri, 4 Jul 2025 13:35:17 +0000 (16:35 +0300)
Continue migration to the MDSS-revision based checks and replace
DPU_WB_INPUT_CTRL feature bit with the core_major_ver >= 5 check.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655407/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-25-3b2085a07884@oss.qualcomm.com
19 files changed:
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_2_sm7150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_4_sm6125.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_4_sm6350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_1_sar2130p.h
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_2_x1e80100.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_wb.c

index 013314b..56d3c38 100644 (file)
@@ -318,7 +318,7 @@ static const struct dpu_wb_cfg sm8650_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .xin_id = 6,
index 5d3b864..ae1b2ed 100644 (file)
@@ -275,7 +275,7 @@ static const struct dpu_wb_cfg sm8150_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index a6e9dfc..fc80406 100644 (file)
@@ -281,7 +281,7 @@ static const struct dpu_wb_cfg sc8180x_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index fe9c930..a56c288 100644 (file)
@@ -241,7 +241,7 @@ static const struct dpu_wb_cfg sm7150_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index 8fb926b..a065f10 100644 (file)
@@ -154,7 +154,7 @@ static const struct dpu_wb_cfg sm6150_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index 5c2c8c5..2950245 100644 (file)
@@ -133,7 +133,7 @@ static const struct dpu_wb_cfg sm6125_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index 9ceff39..7b8b7a1 100644 (file)
@@ -312,7 +312,7 @@ static const struct dpu_wb_cfg sm8250_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index f6a0f1a..c990ba3 100644 (file)
@@ -148,7 +148,7 @@ static const struct dpu_wb_cfg sc7180_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index a46e9e3..093d16b 100644 (file)
@@ -142,7 +142,7 @@ static const struct dpu_wb_cfg sm6350_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index b4d41e2..85aae40 100644 (file)
@@ -285,7 +285,7 @@ static const struct dpu_wb_cfg sm8350_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index 5d88f02..8f978b9 100644 (file)
@@ -159,7 +159,7 @@ static const struct dpu_wb_cfg sc7280_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index 3c0728a..b09a6af 100644 (file)
@@ -298,7 +298,7 @@ static const struct dpu_wb_cfg sm8450_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index b8a1646..0f7b4a2 100644 (file)
@@ -305,7 +305,7 @@ static const struct dpu_wb_cfg sa8775p_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .clk_ctrl = DPU_CLK_CTRL_WB2,
index ef22a9a..465b646 100644 (file)
@@ -294,7 +294,7 @@ static const struct dpu_wb_cfg sm8550_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .xin_id = 6,
index 2e7d440..6caa7d4 100644 (file)
@@ -294,7 +294,7 @@ static const struct dpu_wb_cfg sar2130p_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .xin_id = 6,
index ac95d46..7243eeb 100644 (file)
@@ -294,7 +294,7 @@ static const struct dpu_wb_cfg x1e80100_wb[] = {
        {
                .name = "wb_2", .id = WB_2,
                .base = 0x65000, .len = 0x2c8,
-               .features = WB_SM8250_MASK,
+               .features = WB_SDM845_MASK,
                .format_list = wb2_formats_rgb_yuv,
                .num_formats = ARRAY_SIZE(wb2_formats_rgb_yuv),
                .xin_id = 6,
index ad0460a..6d7be74 100644 (file)
@@ -98,9 +98,6 @@
                         BIT(DPU_WB_QOS_8LVL) | \
                         BIT(DPU_WB_CDP))
 
-#define WB_SM8250_MASK (WB_SDM845_MASK | \
-                        BIT(DPU_WB_INPUT_CTRL))
-
 #define DEFAULT_PIXEL_RAM_SIZE         (50 * 1024)
 #define DEFAULT_DPU_LINE_WIDTH         2048
 #define DEFAULT_DPU_OUTPUT_LINE_WIDTH  2560
index 41906da..8c394e7 100644 (file)
@@ -140,8 +140,6 @@ enum {
   * @DPU_WB_QOS,             Writeback supports QoS control, danger/safe/creq
   * @DPU_WB_QOS_8LVL,        Writeback supports 8-level QoS control
   * @DPU_WB_CDP              Writeback supports client driven prefetch
-  * @DPU_WB_INPUT_CTRL       Writeback supports from which pp block input pixel
-  *                          data arrives.
   * @DPU_WB_CROP             CWB supports cropping
   * @DPU_WB_MAX              maximum value
   */
@@ -155,7 +153,6 @@ enum {
        DPU_WB_QOS,
        DPU_WB_QOS_8LVL,
        DPU_WB_CDP,
-       DPU_WB_INPUT_CTRL,
        DPU_WB_CROP,
        DPU_WB_MAX
 };
index 4853e51..478a091 100644 (file)
@@ -208,7 +208,7 @@ static void _setup_wb_ops(struct dpu_hw_wb_ops *ops,
        if (test_bit(DPU_WB_CDP, &features))
                ops->setup_cdp = dpu_hw_wb_setup_cdp;
 
-       if (test_bit(DPU_WB_INPUT_CTRL, &features))
+       if (mdss_rev->core_major_ver >= 5)
                ops->bind_pingpong_blk = dpu_hw_wb_bind_pingpong_blk;
 
        if (mdss_rev->core_major_ver >= 9)