net: atlantic: add defines for 10M and EEE 100M link mode
authorIgor Russkikh <irusskikh@marvell.com>
Thu, 30 Apr 2020 08:04:31 +0000 (11:04 +0300)
committerDavid S. Miller <davem@davemloft.net>
Fri, 1 May 2020 22:37:57 +0000 (15:37 -0700)
This patch adds defines for 10M and EEE 100M link modes, which are
supported by A2.

10M support is added in this patch series.
EEE is out of scope, but will be added in a follow-up series.

Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/aquantia/atlantic/aq_common.h
drivers/net/ethernet/aquantia/atlantic/aq_ethtool.c
drivers/net/ethernet/aquantia/atlantic/aq_nic.c

index 1261e7c..53620ba 100644 (file)
 #define AQ_HWREV_1     1
 #define AQ_HWREV_2     2
 
-#define AQ_NIC_RATE_10G        BIT(0)
-#define AQ_NIC_RATE_5G         BIT(1)
-#define AQ_NIC_RATE_5GSR       BIT(2)
-#define AQ_NIC_RATE_2GS        BIT(3)
-#define AQ_NIC_RATE_1G         BIT(4)
-#define AQ_NIC_RATE_100M       BIT(5)
+#define AQ_NIC_RATE_10G                BIT(0)
+#define AQ_NIC_RATE_5G         BIT(1)
+#define AQ_NIC_RATE_5GSR       BIT(2)
+#define AQ_NIC_RATE_2GS                BIT(3)
+#define AQ_NIC_RATE_1G         BIT(4)
+#define AQ_NIC_RATE_100M       BIT(5)
+#define AQ_NIC_RATE_10M                BIT(6)
 
-#define AQ_NIC_RATE_EEE_10G    BIT(6)
-#define AQ_NIC_RATE_EEE_5G     BIT(7)
-#define AQ_NIC_RATE_EEE_2GS    BIT(8)
-#define AQ_NIC_RATE_EEE_1G     BIT(9)
+#define AQ_NIC_RATE_EEE_10G    BIT(7)
+#define AQ_NIC_RATE_EEE_5G     BIT(8)
+#define AQ_NIC_RATE_EEE_2GS    BIT(9)
+#define AQ_NIC_RATE_EEE_1G     BIT(10)
+#define AQ_NIC_RATE_EEE_100M   BIT(11)
 
 #endif /* AQ_COMMON_H */
index 7241cf9..0c9dd8e 100644 (file)
@@ -611,6 +611,9 @@ static enum hw_atl_fw2x_rate eee_mask_to_ethtool_mask(u32 speed)
        if (speed & AQ_NIC_RATE_EEE_1G)
                rate |= SUPPORTED_1000baseT_Full;
 
+       if (speed & AQ_NIC_RATE_EEE_100M)
+               rate |= SUPPORTED_100baseT_Full;
+
        return rate;
 }
 
index a369705..80dd744 100644 (file)
@@ -885,6 +885,10 @@ void aq_nic_get_link_ksettings(struct aq_nic_s *self,
                ethtool_link_ksettings_add_link_mode(cmd, supported,
                                                     100baseT_Full);
 
+       if (self->aq_nic_cfg.aq_hw_caps->link_speed_msk & AQ_NIC_RATE_10M)
+               ethtool_link_ksettings_add_link_mode(cmd, supported,
+                                                    10baseT_Full);
+
        if (self->aq_nic_cfg.aq_hw_caps->flow_control) {
                ethtool_link_ksettings_add_link_mode(cmd, supported,
                                                     Pause);
@@ -924,6 +928,10 @@ void aq_nic_get_link_ksettings(struct aq_nic_s *self,
                ethtool_link_ksettings_add_link_mode(cmd, advertising,
                                                     100baseT_Full);
 
+       if (self->aq_nic_cfg.link_speed_msk  & AQ_NIC_RATE_10M)
+               ethtool_link_ksettings_add_link_mode(cmd, advertising,
+                                                    10baseT_Full);
+
        if (self->aq_nic_cfg.fc.cur & AQ_NIC_FC_RX)
                ethtool_link_ksettings_add_link_mode(cmd, advertising,
                                                     Pause);
@@ -954,6 +962,10 @@ int aq_nic_set_link_ksettings(struct aq_nic_s *self,
                speed = cmd->base.speed;
 
                switch (speed) {
+               case SPEED_10:
+                       rate = AQ_NIC_RATE_10M;
+                       break;
+
                case SPEED_100:
                        rate = AQ_NIC_RATE_100M;
                        break;