Merge tag 'qcom-dts-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git...

More Qualcomm DTS updates for v5.20

This adds an additional GSBI, hwclock, smem and tsens nodes for IPQ8064,
in addition to fixing up and improving the existing descriptions of the
platform.

USB interrupts are reordered to please the Devicetree binding.

The Light Pulse Generator is defined for PM8941 and LEDs are defined for
the FairPhone2, Nexus 5 and Sony Xperia devices.

* tag 'qcom-dts-for-5.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: add rpmcc missing clocks for apq/ipq8064 and msm8660
  ARM: dts: qcom: msm8974: Disable remoteprocs by default
  ARM: dts: qcom: ipq8064: add missing smem compatible
  ARM: dts: qcom: ipq8064: add missing hwlock
  ARM: dts: qcom: ipq8064: add speedbin efuse nvmem node
  ARM: dts: qcom: ipq8064: fix and add some missing gsbi node
  ARM: dts: qcom: ipq8064: reduce pci IO size to 64K
  ARM: dts: qcom: ipq8064: disable usb phy by default
  ARM: dts: qcom: ipq8064: add missing snps,dwmac compatible for gmac
  ARM: dts: qcom: ipq8064: add specific dtsi with smb208 rpm regulators
  ARM: dts: qcom: ipq8064: add gsbi6 missing definition
  ARM: dts: qcom: ipq8064: add multiple missing pin definition
  ARM: dts: qcom: msm8974-hammerhead: Add notification LED
  ARM: dts: qcom: msm8974-FP2: Add notification LED
  ARM: dts: qcom: msm8974-sony: Enable LPG
  ARM: dts: qcom: Add LPG node to pm8941
  ARM: dts: qcom: sdx65: reorder USB interrupts
  ARM: dts: qcom: apq8064: create tsens device node

Link: https://lore.kernel.org/r/20220720231111.2114025-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index cc38829..ada4c82 100644 (file)
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -105,7 +105,7 @@
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
 
-                       thermal-sensors = <&gcc 7>;
+                       thermal-sensors = <&tsens 7>;
                        coefficients = <1199 0>;
 
                        trips {
@@ -126,7 +126,7 @@
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
 
-                       thermal-sensors = <&gcc 8>;
+                       thermal-sensors = <&tsens 8>;
                        coefficients = <1132 0>;
 
                        trips {
@@ -147,7 +147,7 @@
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
 
-                       thermal-sensors = <&gcc 9>;
+                       thermal-sensors = <&tsens 9>;
                        coefficients = <1199 0>;
 
                        trips {
@@ -168,7 +168,7 @@
                        polling-delay-passive = <250>;
                        polling-delay = <1000>;
 
-                       thermal-sensors = <&gcc 10>;
+                       thermal-sensors = <&tsens 10>;
                        coefficients = <1132 0>;
 
                        trips {
@@ -810,14 +810,23 @@
                };
 
                gcc: clock-controller@900000 {
-                       compatible = "qcom,gcc-apq8064";
+                       compatible = "qcom,gcc-apq8064", "syscon";
                        reg = <0x00900000 0x4000>;
-                       nvmem-cells = <&tsens_calib>, <&tsens_backup>;
-                       nvmem-cell-names = "calib", "calib_backup";
                        #clock-cells = <1>;
                        #power-domain-cells = <1>;
                        #reset-cells = <1>;
-                       #thermal-sensor-cells = <1>;
+
+                       tsens: thermal-sensor {
+                               compatible = "qcom,msm8960-tsens";
+
+                               nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+                               nvmem-cell-names = "calib", "calib_backup";
+                               interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "uplow";
+
+                               #qcom,sensors = <11>;
+                               #thermal-sensor-cells = <1>;
+                       };
                };
 
                lcc: clock-controller@28000000 {
@@ -853,6 +862,8 @@
                        rpmcc: clock-controller {
                                compatible = "qcom,rpmcc-apq8064", "qcom,rpmcc";
                                #clock-cells = <1>;
+                               clocks = <&pxo_board>, <&cxo_board>;
+                               clock-names = "pxo", "cxo";
                        };
 
                        regulators {

diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
index b63d01d..a654d3c 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
@@ -7,12 +7,6 @@
 
        soc {
                pinmux@800000 {
-                       i2c4_pins: i2c4_pinmux {
-                               pins = "gpio12", "gpio13";
-                               function = "gsbi4";
-                               bias-disable;
-                       };
-
                        buttons_pins: buttons_pins {
                                mux {
                                        pins = "gpio54", "gpio65";

diff --git a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
index 9034f00..5a65cce 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
+++ b/arch/arm/boot/dts/qcom-ipq8064-rb3011.dts
@@ -307,15 +307,6 @@
                };
        };
 
-       mdio0_pins: mdio0_pins {
-               mux {
-                       pins = "gpio0", "gpio1";
-                       function = "gpio";
-                       drive-strength = <8>;
-                       bias-disable;
-               };
-       };
-
        mdio1_pins: mdio1_pins {
                mux {
                        pins = "gpio10", "gpio11";

diff --git a/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
new file mode 100644 (file)
index 0000000..ac9c44f
--- /dev/null
+++ b/arch/arm/boot/dts/qcom-ipq8064-smb208.dtsi
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include "qcom-ipq8064.dtsi"
+
+&rpm {
+       smb208_regulators: regulators {
+               compatible = "qcom,rpm-smb208-regulators";
+
+               smb208_s1a: s1a {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+
+               smb208_s1b: s1b {
+                       regulator-min-microvolt = <1050000>;
+                       regulator-max-microvolt = <1150000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+
+               smb208_s2a: s2a {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+
+               smb208_s2b: s2b {
+                       regulator-min-microvolt = < 800000>;
+                       regulator-max-microvolt = <1250000>;
+
+                       qcom,switch-mode-frequency = <1200000>;
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
index 4b475d9..c8337c8 100644 (file)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -292,8 +292,11 @@
                };
 
                smem: smem@41000000 {
+                       compatible = "qcom,smem";
                        reg = <0x41000000 0x200000>;
                        no-map;
+
+                       hwlocks = <&sfpb_mutex 3>;
                };
        };
 
@@ -382,6 +385,13 @@
                                };
                        };
 
+                       i2c4_pins: i2c4-default {
+                               pins = "gpio12", "gpio13";
+                               function = "gsbi4";
+                               drive-strength = <12>;
+                               bias-disable;
+                       };
+
                        spi_pins: spi_pins {
                                mux {
                                        pins = "gpio18", "gpio19", "gpio21";
@@ -424,6 +434,8 @@
 
                                pullups {
                                        pins = "gpio39";
+                                       function = "nand";
+                                       drive-strength = <10>;
                                        bias-pull-up;
                                };
 
@@ -431,9 +443,32 @@
                                        pins = "gpio40", "gpio41", "gpio42",
                                               "gpio43", "gpio44", "gpio45",
                                               "gpio46", "gpio47";
+                                       function = "nand";
+                                       drive-strength = <10>;
                                        bias-bus-hold;
                                };
                        };
+
+                       mdio0_pins: mdio0-pins {
+                               mux {
+                                       pins = "gpio0", "gpio1";
+                                       function = "mdio";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+                       };
+
+                       rgmii2_pins: rgmii2-pins {
+                               mux {
+                                       pins = "gpio27", "gpio28", "gpio29",
+                                              "gpio30", "gpio31", "gpio32",
+                                              "gpio51", "gpio52", "gpio59",
+                                              "gpio60", "gpio61", "gpio62";
+                                       function = "rgmii2";
+                                       drive-strength = <8>;
+                                       bias-disable;
+                               };
+                       };
                };
 
                intc: interrupt-controller@2000000 {
@@ -507,6 +542,44 @@
                        regulator;
                };
 
+               gsbi1: gsbi@12440000 {
+                       compatible = "qcom,gsbi-v1.0.0";
+                       reg = <0x12440000 0x100>;
+                       cell-index = <1>;
+                       clocks = <&gcc GSBI1_H_CLK>;
+                       clock-names = "iface";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       syscon-tcsr = <&tcsr>;
+
+                       status = "disabled";
+
+                       gsbi1_serial: serial@12450000 {
+                               compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
+                               reg = <0x12450000 0x100>,
+                                     <0x12400000 0x03>;
+                               interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>;
+                               clock-names = "core", "iface";
+
+                               status = "disabled";
+                       };
+
+                       gsbi1_i2c: i2c@12460000 {
+                               compatible = "qcom,i2c-qup-v1.1.1";
+                               reg = <0x12460000 0x1000>;
+                               interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
+                               clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
+                               clock-names = "core", "iface";
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               status = "disabled";
+                       };
+               };
+
                gsbi2: gsbi@12480000 {
                        compatible = "qcom,gsbi-v1.0.0";
                        cell-index = <2>;
@@ -530,7 +603,7 @@
                                status = "disabled";
                        };
 
-                       i2c@124a0000 {
+                       gsbi2_i2c: i2c@124a0000 {
                                compatible = "qcom,i2c-qup-v1.1.1";
                                reg = <0x124a0000 0x1000>;
                                interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
@@ -631,6 +704,49 @@
                        };
                };
 
+               gsbi6: gsbi@16500000 {
+                       compatible = "qcom,gsbi-v1.0.0";
+                       reg = <0x16500000 0x100>;
+                       cell-index = <6>;
+                       clocks = <&gcc GSBI6_H_CLK>;
+                       clock-names = "iface";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       syscon-tcsr = <&tcsr>;
+
+                       status = "disabled";
+
+                       gsbi6_i2c: i2c@16580000 {
+                               compatible = "qcom,i2c-qup-v1.1.1";
+                               reg = <0x16580000 0x1000>;
+                               interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+
+                               clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
+                               clock-names = "core", "iface";
+
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               status = "disabled";
+                       };
+
+                       gsbi6_spi: spi@16580000 {
+                               compatible = "qcom,spi-qup-v1.1.1";
+                               reg = <0x16580000 0x1000>;
+                               interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+
+                               clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
+                               clock-names = "core", "iface";
+
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               status = "disabled";
+                       };
+               };
+
                gsbi7: gsbi@16600000 {
                        status = "disabled";
                        compatible = "qcom,gsbi-v1.0.0";
@@ -652,6 +768,20 @@
                                clock-names = "core", "iface";
                                status = "disabled";
                        };
+
+                       gsbi7_i2c: i2c@16680000 {
+                               compatible = "qcom,i2c-qup-v1.1.1";
+                               reg = <0x16680000 0x1000>;
+                               interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+
+                               clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
+                               clock-names = "core", "iface";
+
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               status = "disabled";
+                       };
                };
 
                rng@1a500000 {
@@ -727,6 +857,9 @@
                        reg = <0x00700000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
+                       speedbin_efuse: speedbin@c0 {
+                               reg = <0xc0 0x4>;
+                       };
                        tsens_calib: calib@400 {
                                reg = <0x400 0xb>;
                        };
@@ -773,6 +906,8 @@
                        rpmcc: clock-controller {
                                compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
                                #clock-cells = <1>;
+                               clocks = <&pxo_board>;
+                               clock-names = "pxo";
                        };
                };
 
@@ -810,7 +945,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
 
-                       ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000   /* downstream I/O */
+                       ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000   /* downstream I/O */
                                  0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
 
                        interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -861,7 +996,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
 
-                       ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000   /* downstream I/O */
+                       ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000   /* downstream I/O */
                                  0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
 
                        interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -912,7 +1047,7 @@
                        #address-cells = <3>;
                        #size-cells = <2>;
 
-                       ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000   /* downstream I/O */
+                       ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000   /* downstream I/O */
                                  0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
 
                        interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
@@ -967,7 +1102,7 @@
 
                gmac0: ethernet@37000000 {
                        device_type = "network";
-                       compatible = "qcom,ipq806x-gmac";
+                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
                        reg = <0x37000000 0x200000>;
                        interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
@@ -991,7 +1126,7 @@
 
                gmac1: ethernet@37200000 {
                        device_type = "network";
-                       compatible = "qcom,ipq806x-gmac";
+                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
                        reg = <0x37200000 0x200000>;
                        interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
@@ -1015,7 +1150,7 @@
 
                gmac2: ethernet@37400000 {
                        device_type = "network";
-                       compatible = "qcom,ipq806x-gmac";
+                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
                        reg = <0x37400000 0x200000>;
                        interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
@@ -1039,7 +1174,7 @@
 
                gmac3: ethernet@37600000 {
                        device_type = "network";
-                       compatible = "qcom,ipq806x-gmac";
+                       compatible = "qcom,ipq806x-gmac", "snps,dwmac";
                        reg = <0x37600000 0x200000>;
                        interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "macirq";
@@ -1113,6 +1248,8 @@
                        clocks = <&gcc USB30_1_UTMI_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
+
+                       status = "disabled";
                };
 
                ss_phy_1: phy@110f8830 {
@@ -1121,6 +1258,8 @@
                        clocks = <&gcc USB30_1_MASTER_CLK>;
                        clock-names = "ref";
                        #phy-cells = <0>;
+
+                       status = "disabled";
                };
 
                usb3_1: usb3@110f8800 {
@@ -1223,5 +1362,12 @@
                                dma-names = "tx", "rx";
                        };
                };
+
+               sfpb_mutex: hwlock@1200600 {
+                       compatible = "qcom,sfpb-mutex";
+                       reg = <0x01200600 0x100>;
+
+                       #hwlock-cells = <1>;
+               };
        };
 };

diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi
index b9cded3..63a501c 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8660.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8660.dtsi
@@ -56,7 +56,7 @@
                        clock-frequency = <19200000>;
                };
 
-               pxo_board {
+               pxo_board: pxo_board {
                        compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <27000000>;
@@ -411,6 +411,8 @@
                        rpmcc: clock-controller {
                                compatible = "qcom,rpmcc-msm8660", "qcom,rpmcc";
                                #clock-cells = <1>;
+                               clocks = <&pxo_board>;
+                               clock-names = "pxo";
                        };
 
                        pm8901-regulators {

diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index b994474..ec5d340 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -3,6 +3,7 @@
 #include "qcom-pm8841.dtsi"
 #include "qcom-pm8941.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
@@ -313,6 +314,35 @@
        };
 };
 
+&pm8941_lpg {
+       status = "okay";
+
+       qcom,power-source = <1>;
+
+       multi-led {
+               color = <LED_COLOR_ID_RGB>;
+               function = LED_FUNCTION_STATUS;
+
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               led@7 {
+                       reg = <7>;
+                       color = <LED_COLOR_ID_RED>;
+               };
+
+               led@6 {
+                       reg = <6>;
+                       color = <LED_COLOR_ID_GREEN>;
+               };
+
+               led@5 {
+                       reg = <5>;
+                       color = <LED_COLOR_ID_BLUE>;
+               };
+       };
+};
+
 &rpm_requests {
        pm8841-regulators {
                compatible = "qcom,rpm-pm8841-regulators";

diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi
index d42b85b..5a70683 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-rhine.dtsi
@@ -3,6 +3,7 @@
 #include "qcom-pm8841.dtsi"
 #include "qcom-pm8941.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
@@ -172,6 +173,35 @@
        };
 };
 
+&pm8941_lpg {
+       status = "okay";
+
+       qcom,power-source = <1>;
+
+       rgb-led {
+               color = <LED_COLOR_ID_RGB>;
+               function = LED_FUNCTION_STATUS;
+
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               led@5 {
+                       reg = <5>;
+                       color = <LED_COLOR_ID_BLUE>;
+               };
+
+               led@6 {
+                       reg = <6>;
+                       color = <LED_COLOR_ID_GREEN>;
+               };
+
+               led@7 {
+                       reg = <7>;
+                       color = <LED_COLOR_ID_RED>;
+               };
+       };
+};
+
 &pm8941_wled {
        status = "okay";
 

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d944c62..9cbdd04 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -1184,6 +1184,8 @@
                        qcom,smem-states = <&modem_smp2p_out 0>;
                        qcom,smem-state-names = "stop";
 
+                       status = "disabled";
+
                        mba {
                                memory-region = <&mba_region>;
                        };
@@ -1666,6 +1668,8 @@
                        qcom,smem-states = <&adsp_smp2p_out 0>;
                        qcom,smem-state-names = "stop";
 
+                       status = "disabled";
+
                        smd-edge {
                                interrupts = <GIC_SPI 156 IRQ_TYPE_EDGE_RISING>;
 

diff --git a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts
index e1ae995..ff6e006 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts
+++ b/arch/arm/boot/dts/qcom-msm8974pro-fairphone-fp2.dts
@@ -3,6 +3,7 @@
 #include "qcom-pm8841.dtsi"
 #include "qcom-pm8941.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
@@ -119,6 +120,35 @@
        };
 };
 
+&pm8941_lpg {
+       status = "okay";
+
+       qcom,power-source = <1>;
+
+       multi-led {
+               color = <LED_COLOR_ID_RGB>;
+               function = LED_FUNCTION_STATUS;
+
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               led@7 {
+                       reg = <7>;
+                       color = <LED_COLOR_ID_RED>;
+               };
+
+               led@6 {
+                       reg = <6>;
+                       color = <LED_COLOR_ID_GREEN>;
+               };
+
+               led@5 {
+                       reg = <5>;
+                       color = <LED_COLOR_ID_BLUE>;
+               };
+       };
+};
+
 &pronto {
        status = "okay";
 
@@ -147,10 +177,12 @@
 };
 
 &remoteproc_adsp {
+       status = "okay";
        cx-supply = <&pm8841_s2>;
 };
 
 &remoteproc_mss {
+       status = "okay";
        cx-supply = <&pm8841_s2>;
        mss-supply = <&pm8841_s3>;
        mx-supply = <&pm8841_s1>;

diff --git a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts
index aa60931..983e10c 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts
+++ b/arch/arm/boot/dts/qcom-msm8974pro-samsung-klte.dts
@@ -457,10 +457,12 @@
 };
 
 &remoteproc_adsp {
+       status = "okay";
        cx-supply = <&pma8084_s2>;
 };
 
 &remoteproc_mss {
+       status = "okay";
        cx-supply = <&pma8084_s2>;
        mss-supply = <&pma8084_s6>;
        mx-supply = <&pma8084_s1>;

diff --git a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts
index 9fc696a..3f45f5c 100644 (file)
--- a/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom-msm8974pro-sony-xperia-shinano-castor.dts
@@ -3,6 +3,7 @@
 #include "qcom-pm8841.dtsi"
 #include "qcom-pm8941.dtsi"
 #include <dt-bindings/input/input.h>
+#include <dt-bindings/leds/common.h>
 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
@@ -288,6 +289,35 @@
 
 };
 
+&pm8941_lpg {
+       status = "okay";
+
+       qcom,power-source = <1>;
+
+       rgb-led {
+               color = <LED_COLOR_ID_RGB>;
+               function = LED_FUNCTION_STATUS;
+
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               led@5 {
+                       reg = <5>;
+                       color = <LED_COLOR_ID_BLUE>;
+               };
+
+               led@6 {
+                       reg = <6>;
+                       color = <LED_COLOR_ID_GREEN>;
+               };
+
+               led@7 {
+                       reg = <7>;
+                       color = <LED_COLOR_ID_RED>;
+               };
+       };
+};
+
 &rpm_requests {
        pm8941-regulators {
                compatible = "qcom,rpm-pm8941-regulators";

diff --git a/arch/arm/boot/dts/qcom-pm8941.dtsi b/arch/arm/boot/dts/qcom-pm8941.dtsi
index a686343..59d0cde 100644 (file)
--- a/arch/arm/boot/dts/qcom-pm8941.dtsi
+++ b/arch/arm/boot/dts/qcom-pm8941.dtsi
@@ -144,6 +144,16 @@
                #address-cells = <1>;
                #size-cells = <0>;
 
+               pm8941_lpg: lpg {
+                       compatible = "qcom,pm8941-lpg";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       #pwm-cells = <2>;
+
+                       status = "disabled";
+               };
+
                pm8941_wled: wled@d800 {
                        compatible = "qcom,pm8941-wled";
                        reg = <0xd800>;

diff --git a/arch/arm/boot/dts/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom-sdx65.dtsi
index 7a19367..8daefd5 100644 (file)
--- a/arch/arm/boot/dts/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom-sdx65.dtsi
@@ -372,11 +372,13 @@
                        assigned-clock-rates = <19200000>, <200000000>;
 
                        interrupts-extended = <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 19 IRQ_TYPE_EDGE_BOTH>,
                                              <&pdc 76 IRQ_TYPE_LEVEL_HIGH>,
-                                             <&pdc 18 IRQ_TYPE_EDGE_BOTH>;
-                       interrupt-names = "hs_phy_irq", "dp_hs_phy_irq",
-                                         "ss_phy_irq", "dm_hs_phy_irq";
+                                             <&pdc 18 IRQ_TYPE_EDGE_BOTH>,
+                                             <&pdc 19 IRQ_TYPE_EDGE_BOTH>;
+                       interrupt-names = "hs_phy_irq",
+                                         "ss_phy_irq",
+                                         "dm_hs_phy_irq",
+                                         "dp_hs_phy_irq";
 
                        power-domains = <&gcc USB30_GDSC>;