drm/amdgpu: Create helper to clear AMDGPU_GEM_CREATE_CPU_GTT_USWC
authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Wed, 24 Jul 2019 14:04:27 +0000 (10:04 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 31 Jul 2019 04:22:48 +0000 (23:22 -0500)
Move the logic to clear AMDGPU_GEM_CREATE_CPU_GTT_USWC in
amdgpu_bo_do_create into standalone helper so it can be reused
in other functions.

v4:
Switch to return bool.

v5: Fix typos.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
drivers/gpu/drm/amd/amdgpu/amdgpu_object.h

index bea6f29..531251d 100644 (file)
@@ -413,6 +413,40 @@ fail:
        return false;
 }
 
+bool amdgpu_bo_support_uswc(u64 bo_flags)
+{
+
+#ifdef CONFIG_X86_32
+       /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
+        * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
+        */
+       return false;
+#elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
+       /* Don't try to enable write-combining when it can't work, or things
+        * may be slow
+        * See https://bugs.freedesktop.org/show_bug.cgi?id=88758
+        */
+
+#ifndef CONFIG_COMPILE_TEST
+#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
+        thanks to write-combining
+#endif
+
+       if (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
+               DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
+                             "better performance thanks to write-combining\n");
+       return false;
+#else
+       /* For architectures that don't support WC memory,
+        * mask out the WC flag from the BO
+        */
+       if (!drm_arch_can_wc_memory())
+               return false;
+
+       return true;
+#endif
+}
+
 static int amdgpu_bo_do_create(struct amdgpu_device *adev,
                               struct amdgpu_bo_param *bp,
                               struct amdgpu_bo **bo_ptr)
@@ -466,33 +500,8 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,
 
        bo->flags = bp->flags;
 
-#ifdef CONFIG_X86_32
-       /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
-        * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
-        */
-       bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
-#elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
-       /* Don't try to enable write-combining when it can't work, or things
-        * may be slow
-        * See https://bugs.freedesktop.org/show_bug.cgi?id=88758
-        */
-
-#ifndef CONFIG_COMPILE_TEST
-#warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
-        thanks to write-combining
-#endif
-
-       if (bo->flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
-               DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
-                             "better performance thanks to write-combining\n");
-       bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
-#else
-       /* For architectures that don't support WC memory,
-        * mask out the WC flag from the BO
-        */
-       if (!drm_arch_can_wc_memory())
+       if (!amdgpu_bo_support_uswc(bo->flags))
                bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
-#endif
 
        bo->tbo.bdev = &adev->mman.bdev;
        if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA |
index d60593c..dc44cf3 100644 (file)
@@ -308,5 +308,7 @@ void amdgpu_sa_bo_dump_debug_info(struct amdgpu_sa_manager *sa_manager,
                                         struct seq_file *m);
 #endif
 
+bool amdgpu_bo_support_uswc(u64 bo_flags);
+
 
 #endif