drm/i915/dg1: Drop final use of IS_DG1_GRAPHICS_STEP
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 27 Jan 2023 22:43:13 +0000 (14:43 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 30 Jan 2023 18:08:19 +0000 (10:08 -0800)
All production DG1 hardware has graphics stepping B0; there is no such
thing as C0.  As such, we can simplify

        IS_DG1_GRAPHICS_STEP(uncore->i915, STEP_A0, STEP_C0)

to just match DG1 in general.

Bspec: 44463
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230127224313.4042331-4-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_region_lmem.c
drivers/gpu/drm/i915/i915_drv.h

index f3ad93d..89fdfc6 100644 (file)
@@ -158,7 +158,7 @@ static const struct intel_memory_region_ops intel_region_lmem_ops = {
 static bool get_legacy_lowmem_region(struct intel_uncore *uncore,
                                     u64 *start, u32 *size)
 {
-       if (!IS_DG1_GRAPHICS_STEP(uncore->i915, STEP_A0, STEP_C0))
+       if (!IS_DG1(uncore->i915))
                return false;
 
        *start = 0;
index 57b84db..495788e 100644 (file)
@@ -656,9 +656,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define IS_RKL_DISPLAY_STEP(p, since, until) \
        (IS_ROCKETLAKE(p) && IS_DISPLAY_STEP(p, since, until))
 
-#define IS_DG1_GRAPHICS_STEP(p, since, until) \
-       (IS_DG1(p) && IS_GRAPHICS_STEP(p, since, until))
-
 #define IS_ADLS_DISPLAY_STEP(__i915, since, until) \
        (IS_ALDERLAKE_S(__i915) && \
         IS_DISPLAY_STEP(__i915, since, until))