RDMA/bnxt_re: Add support for querying HW contexts

Implements support for querying the hardware resource
contexts. This raw data can be used for the debugging
of the field issues.

Signed-off-by: Kashyap Desai <kashyap.desai@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://patch.msgid.link/1730428483-17841-3-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>

diff --git a/drivers/infiniband/hw/bnxt_re/bnxt_re.h b/drivers/infiniband/hw/bnxt_re/bnxt_re.h
index bb28a1f..49186a1 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/bnxt_re.h
+++ b/drivers/infiniband/hw/bnxt_re/bnxt_re.h
@@ -247,4 +247,23 @@ static inline void bnxt_re_set_pacing_dev_state(struct bnxt_re_dev *rdev)
        rdev->qplib_res.pacing_data->dev_err_state =
                test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags);
 }
+
+static inline int bnxt_re_read_context_allowed(struct bnxt_re_dev *rdev)
+{
+       if (!bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx) ||
+           rdev->rcfw.res->cctx->hwrm_intf_ver < HWRM_VERSION_READ_CTX)
+               return -EOPNOTSUPP;
+       return 0;
+}
+
+#define BNXT_RE_CONTEXT_TYPE_QPC_SIZE_P5       1088
+#define BNXT_RE_CONTEXT_TYPE_CQ_SIZE_P5                128
+#define BNXT_RE_CONTEXT_TYPE_MRW_SIZE_P5       128
+#define BNXT_RE_CONTEXT_TYPE_SRQ_SIZE_P5       192
+
+#define BNXT_RE_CONTEXT_TYPE_QPC_SIZE_P7       1088
+#define BNXT_RE_CONTEXT_TYPE_CQ_SIZE_P7                192
+#define BNXT_RE_CONTEXT_TYPE_MRW_SIZE_P7       192
+#define BNXT_RE_CONTEXT_TYPE_SRQ_SIZE_P7       192
+
 #endif

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h b/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h
index 45996e6..3e723d7 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_rcfw.h
@@ -131,6 +131,8 @@ static inline u32 bnxt_qplib_set_cmd_slots(struct cmdq_base *req)
 #define RCFW_CMD_IS_BLOCKING           0x8000
 
 #define HWRM_VERSION_DEV_ATTR_MAX_DPI  0x1000A0000000DULL
+/* HWRM version 1.10.3.18 */
+#define HWRM_VERSION_READ_CTX           0x1000A00030012
 
 /* Crsq buf is 1024-Byte */
 struct bnxt_qplib_crsbe {

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_sp.c b/drivers/infiniband/hw/bnxt_re/qplib_sp.c
index 4f75e7e..ad636d7 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_sp.c
+++ b/drivers/infiniband/hw/bnxt_re/qplib_sp.c
@@ -972,3 +972,38 @@ int bnxt_qplib_modify_cc(struct bnxt_qplib_res *res,
        rc = bnxt_qplib_rcfw_send_message(res->rcfw, &msg);
        return rc;
 }
+
+int bnxt_qplib_read_context(struct bnxt_qplib_rcfw *rcfw, u8 res_type,
+                           u32 xid, u32 resp_size, void *resp_va)
+{
+       struct creq_read_context resp = {};
+       struct bnxt_qplib_cmdqmsg msg = {};
+       struct cmdq_read_context req = {};
+       struct bnxt_qplib_rcfw_sbuf sbuf;
+       int rc;
+
+       sbuf.size = resp_size;
+       sbuf.sb = dma_alloc_coherent(&rcfw->pdev->dev, sbuf.size,
+                                    &sbuf.dma_addr, GFP_KERNEL);
+       if (!sbuf.sb)
+               return -ENOMEM;
+
+       bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req,
+                                CMDQ_BASE_OPCODE_READ_CONTEXT, sizeof(req));
+       req.resp_addr = cpu_to_le64(sbuf.dma_addr);
+       req.resp_size = resp_size / BNXT_QPLIB_CMDQE_UNITS;
+
+       req.xid = cpu_to_le32(xid);
+       req.type = res_type;
+
+       bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, &sbuf, sizeof(req),
+                               sizeof(resp), 0);
+       rc = bnxt_qplib_rcfw_send_message(rcfw, &msg);
+       if (rc)
+               goto free_mem;
+
+       memcpy(resp_va, sbuf.sb, resp_size);
+free_mem:
+       dma_free_coherent(&rcfw->pdev->dev, sbuf.size, sbuf.sb, sbuf.dma_addr);
+       return rc;
+}

diff --git a/drivers/infiniband/hw/bnxt_re/qplib_sp.h b/drivers/infiniband/hw/bnxt_re/qplib_sp.h
index acd9c14..29b841a 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/qplib_sp.h
+++ b/drivers/infiniband/hw/bnxt_re/qplib_sp.h
@@ -352,6 +352,8 @@ int bnxt_qplib_qext_stat(struct bnxt_qplib_rcfw *rcfw, u32 fid,
                         struct bnxt_qplib_ext_stat *estat);
 int bnxt_qplib_modify_cc(struct bnxt_qplib_res *res,
                         struct bnxt_qplib_cc_param *cc_param);
+int bnxt_qplib_read_context(struct bnxt_qplib_rcfw *rcfw, u8 type, u32 xid,
+                           u32 resp_size, void *resp_va);
 
 #define BNXT_VAR_MAX_WQE       4352
 #define BNXT_VAR_MAX_SLOT_ALIGN 256

diff --git a/drivers/infiniband/hw/bnxt_re/roce_hsi.h b/drivers/infiniband/hw/bnxt_re/roce_hsi.h
index a7679ee..d9c5373 100644 (file)
--- a/drivers/infiniband/hw/bnxt_re/roce_hsi.h
+++ b/drivers/infiniband/hw/bnxt_re/roce_hsi.h
@@ -2265,6 +2265,46 @@ struct creq_set_func_resources_resp {
        u8      reserved48[6];
 };
 
+/* cmdq_read_context (size:192b/24B) */
+struct cmdq_read_context {
+       u8      opcode;
+       #define CMDQ_READ_CONTEXT_OPCODE_READ_CONTEXT 0x85UL
+       #define CMDQ_READ_CONTEXT_OPCODE_LAST        CMDQ_READ_CONTEXT_OPCODE_READ_CONTEXT
+       u8      cmd_size;
+       __le16  flags;
+       __le16  cookie;
+       u8      resp_size;
+       u8      reserved8;
+       __le64  resp_addr;
+       __le32  xid;
+       u8      type;
+       #define CMDQ_READ_CONTEXT_TYPE_QPC 0x0UL
+       #define CMDQ_READ_CONTEXT_TYPE_CQ  0x1UL
+       #define CMDQ_READ_CONTEXT_TYPE_MRW 0x2UL
+       #define CMDQ_READ_CONTEXT_TYPE_SRQ 0x3UL
+       #define CMDQ_READ_CONTEXT_TYPE_LAST CMDQ_READ_CONTEXT_TYPE_SRQ
+       u8      unused_0[3];
+};
+
+/* creq_read_context (size:128b/16B) */
+struct creq_read_context {
+       u8      type;
+       #define CREQ_READ_CONTEXT_TYPE_MASK    0x3fUL
+       #define CREQ_READ_CONTEXT_TYPE_SFT     0
+       #define CREQ_READ_CONTEXT_TYPE_QP_EVENT  0x38UL
+       #define CREQ_READ_CONTEXT_TYPE_LAST     CREQ_READ_CONTEXT_TYPE_QP_EVENT
+       u8      status;
+       __le16  cookie;
+       __le32  reserved32;
+       u8      v;
+       #define CREQ_READ_CONTEXT_V     0x1UL
+       u8      event;
+       #define CREQ_READ_CONTEXT_EVENT_READ_CONTEXT 0x85UL
+       #define CREQ_READ_CONTEXT_EVENT_LAST        CREQ_READ_CONTEXT_EVENT_READ_CONTEXT
+       __le16  reserved16;
+       __le32  reserved_32;
+};
+
 /* cmdq_map_tc_to_cos (size:192b/24B) */
 struct cmdq_map_tc_to_cos {
        u8      opcode;