struct regmap *map;
struct clk *clk;
const struct soc_info *soc_info;
+ bool clk_enabled;
unsigned int num_w, num_h, denom_w, denom_h;
const struct drm_format_info *finfo;
u32 ctrl, stride = 0, coef_index = 0, format = 0;
bool needs_modeset, upscaling_w, upscaling_h;
+ int err;
if (!state || !state->fb)
return;
finfo = drm_format_info(state->fb->format->format);
+ if (!ipu->clk_enabled) {
+ err = clk_enable(ipu->clk);
+ if (err) {
+ dev_err(ipu->dev, "Unable to enable clock: %d\n", err);
+ return;
+ }
+
+ ipu->clk_enabled = true;
+ }
+
/* Reset all the registers if needed */
needs_modeset = drm_atomic_crtc_needs_modeset(state->crtc->state);
if (needs_modeset) {
regmap_clear_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CHIP_EN);
ingenic_drm_plane_disable(ipu->master, plane);
+
+ if (ipu->clk_enabled) {
+ clk_disable(ipu->clk);
+ ipu->clk_enabled = false;
+ }
}
static const struct drm_plane_helper_funcs ingenic_ipu_plane_helper_funcs = {
drm_object_attach_property(&plane->base, ipu->sharpness_prop,
ipu->sharpness);
- err = clk_prepare_enable(ipu->clk);
+ err = clk_prepare(ipu->clk);
if (err) {
- dev_err(dev, "Unable to enable clock\n");
+ dev_err(dev, "Unable to prepare clock\n");
return err;
}
{
struct ingenic_ipu *ipu = dev_get_drvdata(dev);
- clk_disable_unprepare(ipu->clk);
+ clk_unprepare(ipu->clk);
}
static const struct component_ops ingenic_ipu_ops = {