},
};
-static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = {
- { .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 },
-};
-
-/* wkup_m3 */
-static struct omap_hwmod am33xx_wkup_m3_hwmod = {
- .name = "wkup_m3",
- .class = &am33xx_wkup_m3_hwmod_class,
- .clkdm_name = "l4_wkup_aon_clkdm",
- /* Keep hardreset asserted */
- .flags = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
- .main_clk = "dpll_core_m4_div2_ck",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM33XX_CM_WKUP_WKUP_M3_CLKCTRL_OFFSET,
- .rstctrl_offs = AM33XX_RM_WKUP_RSTCTRL_OFFSET,
- .rstst_offs = AM33XX_RM_WKUP_RSTST_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
- .rst_lines = am33xx_wkup_m3_resets,
- .rst_lines_cnt = ARRAY_SIZE(am33xx_wkup_m3_resets),
-};
-
-
/*
* Modules omap_hwmod structures
*
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* wkup m3 -> l4 wkup */
-static struct omap_hwmod_ocp_if am33xx_wkup_m3__l4_wkup = {
- .master = &am33xx_wkup_m3_hwmod,
- .slave = &am33xx_l4_wkup_hwmod,
- .clk = "dpll_core_m4_div2_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* l4 wkup -> wkup m3 */
-static struct omap_hwmod_ocp_if am33xx_l4_wkup__wkup_m3 = {
- .master = &am33xx_l4_wkup_hwmod,
- .slave = &am33xx_wkup_m3_hwmod,
- .clk = "dpll_core_m4_div2_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l3_main -> debugss */
static struct omap_hwmod_ocp_if am33xx_l3_main__debugss = {
.master = &am33xx_l3_main_hwmod,
&am33xx_l3_main__l3_s,
&am33xx_l3_main__l3_instr,
&am33xx_l3_s__l3_main,
- &am33xx_wkup_m3__l4_wkup,
&am33xx_l3_main__debugss,
- &am33xx_l4_wkup__wkup_m3,
&am33xx_l4_wkup__smartreflex0,
&am33xx_l4_wkup__smartreflex1,
&am33xx_l3_s__gpmc,