drm/amd/display: Clean up dp_blank functions

[Why]
Unused variable "refresh" and incorrect comment formatting

[How]
Remove variable, reindent comments

Signed-off-by: David Francis <David.Francis@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
index c47c818..cce0d18 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
@@ -908,7 +908,6 @@ static void dce110_stream_encoder_dp_blank(
        struct stream_encoder *enc)
 {
        struct dce110_stream_encoder *enc110 = DCE110STRENC_FROM_STRENC(enc);
-       uint32_t retries = 0;
        uint32_t  reg1 = 0;
        uint32_t max_retries = DP_BLANK_MAX_RETRY * 10;
 
@@ -926,30 +925,28 @@ static void dce110_stream_encoder_dp_blank(
         * (2 = start of the next vertical blank) */
        REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_DIS_DEFER, 2);
        /* Larger delay to wait until VBLANK - use max retry of
-       * 10us*3000=30ms. This covers 16.6ms of typical 60 Hz mode +
-       * a little more because we may not trust delay accuracy.
-       */
+        * 10us*3000=30ms. This covers 16.6ms of typical 60 Hz mode +
+        * a little more because we may not trust delay accuracy.
+        */
        max_retries = DP_BLANK_MAX_RETRY * 150;
 
        /* disable DP stream */
        REG_UPDATE(DP_VID_STREAM_CNTL, DP_VID_STREAM_ENABLE, 0);
 
        /* the encoder stops sending the video stream
-       * at the start of the vertical blanking.
-       * Poll for DP_VID_STREAM_STATUS == 0
-       */
+        * at the start of the vertical blanking.
+        * Poll for DP_VID_STREAM_STATUS == 0
+        */
 
        REG_WAIT(DP_VID_STREAM_CNTL, DP_VID_STREAM_STATUS,
                        0,
                        10, max_retries);
 
-       ASSERT(retries <= max_retries);
-
        /* Tell the DP encoder to ignore timing from CRTC, must be done after
-       * the polling. If we set DP_STEER_FIFO_RESET before DP stream blank is
-       * complete, stream status will be stuck in video stream enabled state,
-       * i.e. DP_VID_STREAM_STATUS stuck at 1.
-       */
+        * the polling. If we set DP_STEER_FIFO_RESET before DP stream blank is
+        * complete, stream status will be stuck in video stream enabled state,
+        * i.e. DP_VID_STREAM_STATUS stuck at 1.
+        */
 
        REG_UPDATE(DP_STEER_FIFO, DP_STEER_FIFO_RESET, true);
 }

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
index 6f9078f..b8b5525 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_stream_encoder.c
@@ -766,7 +766,6 @@ void enc1_stream_encoder_dp_blank(
        struct stream_encoder *enc)
 {
        struct dcn10_stream_encoder *enc1 = DCN10STRENC_FROM_STRENC(enc);
-       uint32_t retries = 0;
        uint32_t  reg1 = 0;
        uint32_t max_retries = DP_BLANK_MAX_RETRY * 10;
 
@@ -803,8 +802,6 @@ void enc1_stream_encoder_dp_blank(
                        0,
                        10, max_retries);
 
-       ASSERT(retries <= max_retries);
-
        /* Tell the DP encoder to ignore timing from CRTC, must be done after
         * the polling. If we set DP_STEER_FIFO_RESET before DP stream blank is
         * complete, stream status will be stuck in video stream enabled state,