drm/amdgpu: modify packet size for pm4 flush tlbs
authorAlex Sierra <alex.sierra@amd.com>
Tue, 14 Jan 2020 03:27:56 +0000 (21:27 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 22 Jan 2020 21:33:52 +0000 (16:33 -0500)
[Why]
PM4 packet size for flush message was oversized.

[How]
Packet size adjusted to allocate flush + fence packets.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

index 874f641..a0d4e79 100644 (file)
@@ -368,7 +368,7 @@ static const struct kiq_pm4_funcs gfx_v10_0_kiq_pm4_funcs = {
        .map_queues_size = 7,
        .unmap_queues_size = 6,
        .query_status_size = 7,
-       .invalidate_tlbs_size = 12,
+       .invalidate_tlbs_size = 2,
 };
 
 static void gfx_v10_0_set_kiq_pm4_funcs(struct amdgpu_device *adev)
index 46ab467..6c02fe6 100644 (file)
@@ -859,7 +859,7 @@ static const struct kiq_pm4_funcs gfx_v9_0_kiq_pm4_funcs = {
        .map_queues_size = 7,
        .unmap_queues_size = 6,
        .query_status_size = 7,
-       .invalidate_tlbs_size = 12,
+       .invalidate_tlbs_size = 2,
 };
 
 static void gfx_v9_0_set_kiq_pm4_funcs(struct amdgpu_device *adev)
index bbede09..86f4ffe 100644 (file)
@@ -418,7 +418,8 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
 
        if (amdgpu_emu_mode == 0 && ring->sched.ready) {
                spin_lock(&adev->gfx.kiq.ring_lock);
-               amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size);
+               /* 2 dwords flush + 8 dwords fence */
+               amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size + 8);
                kiq->pmf->kiq_invalidate_tlbs(ring,
                                        pasid, flush_type, all_hub);
                amdgpu_fence_emit_polling(ring, &seq);
index 40a4968..54bdc17 100644 (file)
@@ -578,7 +578,8 @@ static int gmc_v9_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev,
 
        if (ring->sched.ready) {
                spin_lock(&adev->gfx.kiq.ring_lock);
-               amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size);
+               /* 2 dwords flush + 8 dwords fence */
+               amdgpu_ring_alloc(ring, kiq->pmf->invalidate_tlbs_size + 8);
                kiq->pmf->kiq_invalidate_tlbs(ring,
                                        pasid, flush_type, all_hub);
                amdgpu_fence_emit_polling(ring, &seq);