drm/i915/selftests: fix the uint*_t types that have crept in
authorJani Nikula <jani.nikula@intel.com>
Wed, 13 Jan 2021 14:13:17 +0000 (16:13 +0200)
committerJani Nikula <jani.nikula@intel.com>
Thu, 14 Jan 2021 09:52:07 +0000 (11:52 +0200)
Always prefer the kernel types over stdint types in i915.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210113141317.30765-1-jani.nikula@intel.com
drivers/gpu/drm/i915/gt/selftest_mocs.c

index ca72894..cf373c7 100644 (file)
@@ -99,7 +99,7 @@ static void live_mocs_fini(struct live_mocs *arg)
 
 static int read_regs(struct i915_request *rq,
                     u32 addr, unsigned int count,
-                    uint32_t *offset)
+                    u32 *offset)
 {
        unsigned int i;
        u32 *cs;
@@ -127,7 +127,7 @@ static int read_regs(struct i915_request *rq,
 
 static int read_mocs_table(struct i915_request *rq,
                           const struct drm_i915_mocs_table *table,
-                          uint32_t *offset)
+                          u32 *offset)
 {
        u32 addr;
 
@@ -141,7 +141,7 @@ static int read_mocs_table(struct i915_request *rq,
 
 static int read_l3cc_table(struct i915_request *rq,
                           const struct drm_i915_mocs_table *table,
-                          uint32_t *offset)
+                          u32 *offset)
 {
        u32 addr = i915_mmio_reg_offset(GEN9_LNCFCMOCS(0));
 
@@ -150,7 +150,7 @@ static int read_l3cc_table(struct i915_request *rq,
 
 static int check_mocs_table(struct intel_engine_cs *engine,
                            const struct drm_i915_mocs_table *table,
-                           uint32_t **vaddr)
+                           u32 **vaddr)
 {
        unsigned int i;
        u32 expect;
@@ -179,7 +179,7 @@ static bool mcr_range(struct drm_i915_private *i915, u32 offset)
 
 static int check_l3cc_table(struct intel_engine_cs *engine,
                            const struct drm_i915_mocs_table *table,
-                           uint32_t **vaddr)
+                           u32 **vaddr)
 {
        /* Can we read the MCR range 0xb00 directly? See intel_workarounds! */
        u32 reg = i915_mmio_reg_offset(GEN9_LNCFCMOCS(0));