/* We need to lock reset domain only once both for XGMI and single device */
tmp_adev = list_first_entry(device_list_handle, struct amdgpu_device,
reset_list);
- amdgpu_device_lock_reset_domain(tmp_adev->reset_domain, hive);
+ amdgpu_device_lock_reset_domain(tmp_adev->reset_domain);
/* block all schedulers and reset given job's ring */
list_for_each_entry(tmp_adev, device_list_handle, reset_list) {
* Locking adev->reset_domain->sem will prevent any external access
* to GPU during PCI error recovery
*/
- amdgpu_device_lock_reset_domain(adev->reset_domain, NULL);
+ amdgpu_device_lock_reset_domain(adev->reset_domain);
amdgpu_device_set_mp1_state(adev);
/*
return reset_domain;
}
-void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain,
- struct amdgpu_hive_info *hive)
+void amdgpu_device_lock_reset_domain(struct amdgpu_reset_domain *reset_domain)
{
atomic_set(&reset_domain->in_gpu_reset, 1);
-
- if (hive) {
- down_write_nest_lock(&reset_domain->sem, &hive->hive_lock);
- } else {
- down_write(&reset_domain->sem);
- }
+ down_write(&reset_domain->sem);
}