drm/amd/display: Modify Vmin default value
authorMax Tseng <max.tseng@amd.com>
Fri, 22 Sep 2023 08:50:53 +0000 (16:50 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 9 Oct 2023 20:53:17 +0000 (16:53 -0400)
Fine tune the Vmin clock value

Reviewed-by: Robin Chen <robin.chen@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Max Tseng <max.tseng@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c
drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c

index d8fa229..64a2692 100644 (file)
@@ -1914,7 +1914,7 @@ static bool dcn314_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
-       dc->caps.max_disp_clock_khz_at_vmin = 694000;
+       dc->caps.max_disp_clock_khz_at_vmin = 650000;
 
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;
index 8288465..f1d776f 100644 (file)
@@ -1830,7 +1830,13 @@ static bool dcn35_resource_construct(
        dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
        dc->caps.color.mpc.ocsc = 1;
 
-       dc->caps.max_disp_clock_khz_at_vmin = 669154;
+       /* max_disp_clock_khz_at_vmin is slightly lower than the STA value in order
+        * to provide some margin.
+        * It's expected for furture ASIC to have equal or higher value, in order to
+        * have determinstic power improvement from generate to genration.
+        * (i.e., we should not expect new ASIC generation with lower vmin rate)
+        */
+       dc->caps.max_disp_clock_khz_at_vmin = 650000;
 
        /* Use pipe context based otg sync logic */
        dc->config.use_pipe_ctx_sync_logic = true;