pinctrl: renesas: r8a779g0: Fix alignment in GPSR[678]_* macros

The alignment of the second column in the definitions of the GPSR[678]_*
macros does not match the alignment used in other definitions.
Fix this to improve uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9424a0e7f6d66a94d333df9fdc5cdf3b7defb8f5.1669036423.git.geert+renesas@glider.be

diff --git a/drivers/pinctrl/renesas/pfc-r8a779g0.c b/drivers/pinctrl/renesas/pfc-r8a779g0.c
index 5dd1c2c..bf7fcce 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a779g0.c
+++ b/drivers/pinctrl/renesas/pfc-r8a779g0.c
@@ -206,66 +206,66 @@
 #define GPSR5_0                FM(AVB2_AVTP_PPS)
 
 /* GPSR 6 */
-#define GPSR6_20       F_(AVB1_TXCREFCLK,              IP2SR6_19_16)
-#define GPSR6_19       F_(AVB1_RD3,                    IP2SR6_15_12)
-#define GPSR6_18       F_(AVB1_TD3,                    IP2SR6_11_8)
-#define GPSR6_17       F_(AVB1_RD2,                    IP2SR6_7_4)
-#define GPSR6_16       F_(AVB1_TD2,                    IP2SR6_3_0)
-#define GPSR6_15       F_(AVB1_RD0,                    IP1SR6_31_28)
-#define GPSR6_14       F_(AVB1_RD1,                    IP1SR6_27_24)
-#define GPSR6_13       F_(AVB1_TD0,                    IP1SR6_23_20)
-#define GPSR6_12       F_(AVB1_TD1,                    IP1SR6_19_16)
-#define GPSR6_11       F_(AVB1_AVTP_CAPTURE,           IP1SR6_15_12)
-#define GPSR6_10       F_(AVB1_AVTP_PPS,               IP1SR6_11_8)
-#define GPSR6_9                F_(AVB1_RX_CTL,                 IP1SR6_7_4)
-#define GPSR6_8                F_(AVB1_RXC,                    IP1SR6_3_0)
-#define GPSR6_7                F_(AVB1_TX_CTL,                 IP0SR6_31_28)
-#define GPSR6_6                F_(AVB1_TXC,                    IP0SR6_27_24)
-#define GPSR6_5                F_(AVB1_AVTP_MATCH,             IP0SR6_23_20)
-#define GPSR6_4                F_(AVB1_LINK,                   IP0SR6_19_16)
-#define GPSR6_3                F_(AVB1_PHY_INT,                IP0SR6_15_12)
-#define GPSR6_2                F_(AVB1_MDC,                    IP0SR6_11_8)
-#define GPSR6_1                F_(AVB1_MAGIC,                  IP0SR6_7_4)
-#define GPSR6_0                F_(AVB1_MDIO,                   IP0SR6_3_0)
+#define GPSR6_20       F_(AVB1_TXCREFCLK,      IP2SR6_19_16)
+#define GPSR6_19       F_(AVB1_RD3,            IP2SR6_15_12)
+#define GPSR6_18       F_(AVB1_TD3,            IP2SR6_11_8)
+#define GPSR6_17       F_(AVB1_RD2,            IP2SR6_7_4)
+#define GPSR6_16       F_(AVB1_TD2,            IP2SR6_3_0)
+#define GPSR6_15       F_(AVB1_RD0,            IP1SR6_31_28)
+#define GPSR6_14       F_(AVB1_RD1,            IP1SR6_27_24)
+#define GPSR6_13       F_(AVB1_TD0,            IP1SR6_23_20)
+#define GPSR6_12       F_(AVB1_TD1,            IP1SR6_19_16)
+#define GPSR6_11       F_(AVB1_AVTP_CAPTURE,   IP1SR6_15_12)
+#define GPSR6_10       F_(AVB1_AVTP_PPS,       IP1SR6_11_8)
+#define GPSR6_9                F_(AVB1_RX_CTL,         IP1SR6_7_4)
+#define GPSR6_8                F_(AVB1_RXC,            IP1SR6_3_0)
+#define GPSR6_7                F_(AVB1_TX_CTL,         IP0SR6_31_28)
+#define GPSR6_6                F_(AVB1_TXC,            IP0SR6_27_24)
+#define GPSR6_5                F_(AVB1_AVTP_MATCH,     IP0SR6_23_20)
+#define GPSR6_4                F_(AVB1_LINK,           IP0SR6_19_16)
+#define GPSR6_3                F_(AVB1_PHY_INT,        IP0SR6_15_12)
+#define GPSR6_2                F_(AVB1_MDC,            IP0SR6_11_8)
+#define GPSR6_1                F_(AVB1_MAGIC,          IP0SR6_7_4)
+#define GPSR6_0                F_(AVB1_MDIO,           IP0SR6_3_0)
 
 /* GPSR7 */
-#define GPSR7_20       F_(AVB0_RX_CTL,                 IP2SR7_19_16)
-#define GPSR7_19       F_(AVB0_RXC,                    IP2SR7_15_12)
-#define GPSR7_18       F_(AVB0_RD0,                    IP2SR7_11_8)
-#define GPSR7_17       F_(AVB0_RD1,                    IP2SR7_7_4)
-#define GPSR7_16       F_(AVB0_TX_CTL,                 IP2SR7_3_0)
-#define GPSR7_15       F_(AVB0_TXC,                    IP1SR7_31_28)
-#define GPSR7_14       F_(AVB0_MDIO,                   IP1SR7_27_24)
-#define GPSR7_13       F_(AVB0_MDC,                    IP1SR7_23_20)
-#define GPSR7_12       F_(AVB0_RD2,                    IP1SR7_19_16)
-#define GPSR7_11       F_(AVB0_TD0,                    IP1SR7_15_12)
-#define GPSR7_10       F_(AVB0_MAGIC,                  IP1SR7_11_8)
-#define GPSR7_9                F_(AVB0_TXCREFCLK,              IP1SR7_7_4)
-#define GPSR7_8                F_(AVB0_RD3,                    IP1SR7_3_0)
-#define GPSR7_7                F_(AVB0_TD1,                    IP0SR7_31_28)
-#define GPSR7_6                F_(AVB0_TD2,                    IP0SR7_27_24)
-#define GPSR7_5                F_(AVB0_PHY_INT,                IP0SR7_23_20)
-#define GPSR7_4                F_(AVB0_LINK,                   IP0SR7_19_16)
-#define GPSR7_3                F_(AVB0_TD3,                    IP0SR7_15_12)
-#define GPSR7_2                F_(AVB0_AVTP_MATCH,             IP0SR7_11_8)
-#define GPSR7_1                F_(AVB0_AVTP_CAPTURE,           IP0SR7_7_4)
-#define GPSR7_0                F_(AVB0_AVTP_PPS,               IP0SR7_3_0)
+#define GPSR7_20       F_(AVB0_RX_CTL,         IP2SR7_19_16)
+#define GPSR7_19       F_(AVB0_RXC,            IP2SR7_15_12)
+#define GPSR7_18       F_(AVB0_RD0,            IP2SR7_11_8)
+#define GPSR7_17       F_(AVB0_RD1,            IP2SR7_7_4)
+#define GPSR7_16       F_(AVB0_TX_CTL,         IP2SR7_3_0)
+#define GPSR7_15       F_(AVB0_TXC,            IP1SR7_31_28)
+#define GPSR7_14       F_(AVB0_MDIO,           IP1SR7_27_24)
+#define GPSR7_13       F_(AVB0_MDC,            IP1SR7_23_20)
+#define GPSR7_12       F_(AVB0_RD2,            IP1SR7_19_16)
+#define GPSR7_11       F_(AVB0_TD0,            IP1SR7_15_12)
+#define GPSR7_10       F_(AVB0_MAGIC,          IP1SR7_11_8)
+#define GPSR7_9                F_(AVB0_TXCREFCLK,      IP1SR7_7_4)
+#define GPSR7_8                F_(AVB0_RD3,            IP1SR7_3_0)
+#define GPSR7_7                F_(AVB0_TD1,            IP0SR7_31_28)
+#define GPSR7_6                F_(AVB0_TD2,            IP0SR7_27_24)
+#define GPSR7_5                F_(AVB0_PHY_INT,        IP0SR7_23_20)
+#define GPSR7_4                F_(AVB0_LINK,           IP0SR7_19_16)
+#define GPSR7_3                F_(AVB0_TD3,            IP0SR7_15_12)
+#define GPSR7_2                F_(AVB0_AVTP_MATCH,     IP0SR7_11_8)
+#define GPSR7_1                F_(AVB0_AVTP_CAPTURE,   IP0SR7_7_4)
+#define GPSR7_0                F_(AVB0_AVTP_PPS,       IP0SR7_3_0)
 
 /* GPSR8 */
-#define GPSR8_13       F_(GP8_13,                      IP1SR8_23_20)
-#define GPSR8_12       F_(GP8_12,                      IP1SR8_19_16)
-#define GPSR8_11       F_(SDA5,                        IP1SR8_15_12)
-#define GPSR8_10       F_(SCL5,                        IP1SR8_11_8)
-#define GPSR8_9                F_(SDA4,                        IP1SR8_7_4)
-#define GPSR8_8                F_(SCL4,                        IP1SR8_3_0)
-#define GPSR8_7                F_(SDA3,                        IP0SR8_31_28)
-#define GPSR8_6                F_(SCL3,                        IP0SR8_27_24)
-#define GPSR8_5                F_(SDA2,                        IP0SR8_23_20)
-#define GPSR8_4                F_(SCL2,                        IP0SR8_19_16)
-#define GPSR8_3                F_(SDA1,                        IP0SR8_15_12)
-#define GPSR8_2                F_(SCL1,                        IP0SR8_11_8)
-#define GPSR8_1                F_(SDA0,                        IP0SR8_7_4)
-#define GPSR8_0                F_(SCL0,                        IP0SR8_3_0)
+#define GPSR8_13       F_(GP8_13,              IP1SR8_23_20)
+#define GPSR8_12       F_(GP8_12,              IP1SR8_19_16)
+#define GPSR8_11       F_(SDA5,                IP1SR8_15_12)
+#define GPSR8_10       F_(SCL5,                IP1SR8_11_8)
+#define GPSR8_9                F_(SDA4,                IP1SR8_7_4)
+#define GPSR8_8                F_(SCL4,                IP1SR8_3_0)
+#define GPSR8_7                F_(SDA3,                IP0SR8_31_28)
+#define GPSR8_6                F_(SCL3,                IP0SR8_27_24)
+#define GPSR8_5                F_(SDA2,                IP0SR8_23_20)
+#define GPSR8_4                F_(SCL2,                IP0SR8_19_16)
+#define GPSR8_3                F_(SDA1,                IP0SR8_15_12)
+#define GPSR8_2                F_(SCL1,                IP0SR8_11_8)
+#define GPSR8_1                F_(SDA0,                IP0SR8_7_4)
+#define GPSR8_0                F_(SCL0,                IP0SR8_3_0)
 
 /* SR0 */
 /* IP0SR0 */           /* 0 */                 /* 1 */                 /* 2 */         /* 3            4        5        6        7        8        9        A        B        C        D        E        F */