drm/msm: dsi: Use OPP API to set clk/perf state

On SDM845 and SC7180 DSI needs to express a performance state
requirement on a power domain depending on the clock rates.
Use OPP table from DT to register with OPP framework and use
dev_pm_opp_set_rate() to set the clk/perf state.

dev_pm_opp_set_rate() is designed to be equivalent to clk_set_rate()
for devices without an OPP table, hence the change works fine
on devices/platforms which only need to set a clock rate.

Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 66ca0c0..ce772fc 100644 (file)
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -14,6 +14,7 @@
 #include <linux/of_graph.h>
 #include <linux/of_irq.h>
 #include <linux/pinctrl/consumer.h>
+#include <linux/pm_opp.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
 #include <linux/spinlock.h>
@@ -111,6 +112,9 @@ struct msm_dsi_host {
        struct clk *pixel_clk_src;
        struct clk *byte_intf_clk;
 
+       struct opp_table *opp_table;
+       bool has_opp_table;
+
        u32 byte_clk_rate;
        u32 pixel_clk_rate;
        u32 esc_clk_rate;
@@ -512,9 +516,10 @@ int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host)
        DBG("Set clk rates: pclk=%d, byteclk=%d",
                msm_host->mode->clock, msm_host->byte_clk_rate);
 
-       ret = clk_set_rate(msm_host->byte_clk, msm_host->byte_clk_rate);
+       ret = dev_pm_opp_set_rate(&msm_host->pdev->dev,
+                                 msm_host->byte_clk_rate);
        if (ret) {
-               pr_err("%s: Failed to set rate byte clk, %d\n", __func__, ret);
+               pr_err("%s: dev_pm_opp_set_rate failed %d\n", __func__, ret);
                return ret;
        }
 
@@ -658,6 +663,8 @@ error:
 
 void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host)
 {
+       /* Drop the performance state vote */
+       dev_pm_opp_set_rate(&msm_host->pdev->dev, 0);
        clk_disable_unprepare(msm_host->esc_clk);
        clk_disable_unprepare(msm_host->pixel_clk);
        if (msm_host->byte_intf_clk)
@@ -1879,6 +1886,19 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
                goto fail;
        }
 
+       msm_host->opp_table = dev_pm_opp_set_clkname(&pdev->dev, "byte");
+       if (IS_ERR(msm_host->opp_table))
+               return PTR_ERR(msm_host->opp_table);
+       /* OPP table is optional */
+       ret = dev_pm_opp_of_add_table(&pdev->dev);
+       if (!ret) {
+               msm_host->has_opp_table = true;
+       } else if (ret != -ENODEV) {
+               dev_err(&pdev->dev, "invalid OPP table in device tree\n");
+               dev_pm_opp_put_clkname(msm_host->opp_table);
+               return ret;
+       }
+
        init_completion(&msm_host->dma_comp);
        init_completion(&msm_host->video_comp);
        mutex_init(&msm_host->dev_mutex);
@@ -1914,6 +1934,9 @@ void msm_dsi_host_destroy(struct mipi_dsi_host *host)
        mutex_destroy(&msm_host->cmd_mutex);
        mutex_destroy(&msm_host->dev_mutex);
 
+       if (msm_host->has_opp_table)
+               dev_pm_opp_of_remove_table(&msm_host->pdev->dev);
+       dev_pm_opp_put_clkname(msm_host->opp_table);
        pm_runtime_disable(&msm_host->pdev->dev);
 }