perf/x86/ibs: Add new IBS register bits into header

IBS support has been enhanced with two new features in upcoming uarch:

  1. DataSrc extension and
  2. L3 miss filtering.

Additional set of bits has been introduced in IBS registers to use these
features. Define these new bits into arch/x86/ header.

  [ bp: Massage commit message. ]

Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Ian Rogers <irogers@google.com>
Link: https://lore.kernel.org/r/20220604044519.594-7-ravi.bangoria@amd.com

diff --git a/arch/x86/include/asm/amd-ibs.h b/arch/x86/include/asm/amd-ibs.h
index aabdbb5..f3eb098 100644 (file)
--- a/arch/x86/include/asm/amd-ibs.h
+++ b/arch/x86/include/asm/amd-ibs.h
@@ -29,7 +29,10 @@ union ibs_fetch_ctl {
                        rand_en:1,      /* 57: random tagging enable */
                        fetch_l2_miss:1,/* 58: L2 miss for sampled fetch
                                         *      (needs IbsFetchComp) */
-                       reserved:5;     /* 59-63: reserved */
+                       l3_miss_only:1, /* 59: Collect L3 miss samples only */
+                       fetch_oc_miss:1,/* 60: Op cache miss for the sampled fetch */
+                       fetch_l3_miss:1,/* 61: L3 cache miss for the sampled fetch */
+                       reserved:2;     /* 62-63: reserved */
        };
 };
 
@@ -38,14 +41,14 @@ union ibs_op_ctl {
        __u64 val;
        struct {
                __u64   opmaxcnt:16,    /* 0-15: periodic op max. count */
-                       reserved0:1,    /* 16: reserved */
+                       l3_miss_only:1, /* 16: Collect L3 miss samples only */
                        op_en:1,        /* 17: op sampling enable */
                        op_val:1,       /* 18: op sample valid */
                        cnt_ctl:1,      /* 19: periodic op counter control */
                        opmaxcnt_ext:7, /* 20-26: upper 7 bits of periodic op maximum count */
-                       reserved1:5,    /* 27-31: reserved */
+                       reserved0:5,    /* 27-31: reserved */
                        opcurcnt:27,    /* 32-58: periodic op counter current count */
-                       reserved2:5;    /* 59-63: reserved */
+                       reserved1:5;    /* 59-63: reserved */
        };
 };
 
@@ -71,11 +74,12 @@ union ibs_op_data {
 union ibs_op_data2 {
        __u64 val;
        struct {
-               __u64   data_src:3,     /* 0-2: data source */
+               __u64   data_src_lo:3,  /* 0-2: data source low */
                        reserved0:1,    /* 3: reserved */
                        rmt_node:1,     /* 4: destination node */
                        cache_hit_st:1, /* 5: cache hit state */
-                       reserved1:57;   /* 5-63: reserved */
+                       data_src_hi:2,  /* 6-7: data source high */
+                       reserved1:56;   /* 8-63: reserved */
        };
 };