arm64: dts: renesas: r8a774e1: Add SDHI nodes
authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Wed, 15 Jul 2020 11:09:00 +0000 (12:09 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 17 Jul 2020 08:58:24 +0000 (10:58 +0200)
Add SDHI[0-2] device nodes to R8A774E1 SoC.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Marian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Link: https://lore.kernel.org/r/1594811350-14066-11-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a774e1.dtsi

index 71d072e..4b3a449 100644 (file)
                };
 
                sdhi0: mmc@ee100000 {
+                       compatible = "renesas,sdhi-r8a774e1",
+                                    "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee100000 0 0x2000>;
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 314>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+                       resets = <&cpg 314>;
+                       iommus = <&ipmmu_ds1 32>;
                        status = "disabled";
+               };
 
-                       /* placeholder */
+               sdhi1: mmc@ee120000 {
+                       compatible = "renesas,sdhi-r8a774e1",
+                                    "renesas,rcar-gen3-sdhi";
+                       reg = <0 0xee120000 0 0x2000>;
+                       interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 313>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+                       resets = <&cpg 313>;
+                       iommus = <&ipmmu_ds1 33>;
+                       status = "disabled";
                };
 
                sdhi2: mmc@ee140000 {
+                       compatible = "renesas,sdhi-r8a774e1",
+                                    "renesas,rcar-gen3-sdhi";
                        reg = <0 0xee140000 0 0x2000>;
+                       interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 312>;
+                       max-frequency = <200000000>;
+                       power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
+                       resets = <&cpg 312>;
+                       iommus = <&ipmmu_ds1 34>;
                        status = "disabled";
-
-                       /* placeholder */
                };
 
                sdhi3: mmc@ee160000 {
                        max-frequency = <200000000>;
                        power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>;
                        resets = <&cpg 311>;
+                       iommus = <&ipmmu_ds1 35>;
                        status = "disabled";
                };