drm/amd/display: Increase DCN35 SR enter/exit latency
authorLeo Li <sunpeng.li@amd.com>
Mon, 3 Nov 2025 16:14:59 +0000 (11:14 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 12 Feb 2026 20:12:26 +0000 (15:12 -0500)
[Why & How]

On Framework laptops with DDR5 modules, underflow can be observed.
It's unclear why it only occurs on specific desktop contents. However,
increasing enter/exit latencies by 3us seems to resolve it.

Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4463
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

index 7abe681..6fc5247 100644 (file)
@@ -766,32 +766,32 @@ static struct wm_table ddr5_wm_table = {
                        .wm_inst = WM_A,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 28.0,
-                       .sr_enter_plus_exit_time_us = 30.0,
+                       .sr_exit_time_us = 31.0,
+                       .sr_enter_plus_exit_time_us = 33.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_B,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 28.0,
-                       .sr_enter_plus_exit_time_us = 30.0,
+                       .sr_exit_time_us = 31.0,
+                       .sr_enter_plus_exit_time_us = 33.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_C,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 28.0,
-                       .sr_enter_plus_exit_time_us = 30.0,
+                       .sr_exit_time_us = 31.0,
+                       .sr_enter_plus_exit_time_us = 33.0,
                        .valid = true,
                },
                {
                        .wm_inst = WM_D,
                        .wm_type = WM_TYPE_PSTATE_CHG,
                        .pstate_latency_us = 11.72,
-                       .sr_exit_time_us = 28.0,
-                       .sr_enter_plus_exit_time_us = 30.0,
+                       .sr_exit_time_us = 31.0,
+                       .sr_enter_plus_exit_time_us = 33.0,
                        .valid = true,
                },
        }
index 817a370..8a177d5 100644 (file)
@@ -164,8 +164,8 @@ struct _vcs_dpi_soc_bounding_box_st dcn3_5_soc = {
                },
        },
        .num_states = 5,
-       .sr_exit_time_us = 28.0,
-       .sr_enter_plus_exit_time_us = 30.0,
+       .sr_exit_time_us = 31.0,
+       .sr_enter_plus_exit_time_us = 33.0,
        .sr_exit_z8_time_us = 250.0,
        .sr_enter_plus_exit_z8_time_us = 350.0,
        .fclk_change_latency_us = 24.0,