nvmem: rockchip-otp: Generalize rockchip_otp_wait_status()
authorCristian Ciocaltea <cristian.ciocaltea@collabora.com>
Sun, 11 Jun 2023 14:03:14 +0000 (15:03 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 15 Jun 2023 11:42:17 +0000 (13:42 +0200)
In preparation to support additional Rockchip OTP memory devices with
different register layout, generalize rockchip_otp_wait_status() to
accept a new parameter for specifying the offset of the status register.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Tested-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Message-ID: <20230611140330.154222-11-srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/nvmem/rockchip-otp.c

index b5a84b3..b62e001 100644 (file)
@@ -90,18 +90,19 @@ static int rockchip_otp_reset(struct rockchip_otp *otp)
        return 0;
 }
 
-static int rockchip_otp_wait_status(struct rockchip_otp *otp, u32 flag)
+static int rockchip_otp_wait_status(struct rockchip_otp *otp,
+                                   unsigned int reg, u32 flag)
 {
        u32 status = 0;
        int ret;
 
-       ret = readl_poll_timeout_atomic(otp->base + OTPC_INT_STATUS, status,
+       ret = readl_poll_timeout_atomic(otp->base + reg, status,
                                        (status & flag), 1, OTPC_TIMEOUT);
        if (ret)
                return ret;
 
        /* clean int status */
-       writel(flag, otp->base + OTPC_INT_STATUS);
+       writel(flag, otp->base + reg);
 
        return 0;
 }
@@ -123,7 +124,7 @@ static int rockchip_otp_ecc_enable(struct rockchip_otp *otp, bool enable)
 
        writel(SBPI_ENABLE_MASK | SBPI_ENABLE, otp->base + OTPC_SBPI_CTRL);
 
-       ret = rockchip_otp_wait_status(otp, OTPC_SBPI_DONE);
+       ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_SBPI_DONE);
        if (ret < 0)
                dev_err(otp->dev, "timeout during ecc_enable\n");
 
@@ -156,7 +157,7 @@ static int px30_otp_read(void *context, unsigned int offset,
                       otp->base + OTPC_USER_ADDR);
                writel(OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK,
                       otp->base + OTPC_USER_ENABLE);
-               ret = rockchip_otp_wait_status(otp, OTPC_USER_DONE);
+               ret = rockchip_otp_wait_status(otp, OTPC_INT_STATUS, OTPC_USER_DONE);
                if (ret < 0) {
                        dev_err(otp->dev, "timeout during read setup\n");
                        goto read_end;