arm64: dts: imx8-apalis: add clock configuration for 44.1 kHz hdmi audio
authorStefan Eichenberger <stefan.eichenberger@toradex.com>
Mon, 20 Jan 2025 09:45:22 +0000 (10:45 +0100)
committerShawn Guo <shawnguo@kernel.org>
Tue, 25 Feb 2025 00:32:58 +0000 (08:32 +0800)
Currently, HDMI audio cannot play sound at a 44.1 kHz sample rate due to
a clock frequency mismatch. This update resolves the issue by allowing
the sai driver to change the clock parent to AUDIO_PLL_1 when the sample
rate is 44.1 kHz. It also ensures that AUDIO_PLL_1 operates at the
correct frequency for this configuration.

Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8-apalis-v1.1.dtsi

index a3fc945..dbea1ee 100644 (file)
        status = "okay";
 };
 
+/* Apalis HDMI Audio */
+&sai5 {
+       assigned-clocks = <&acm IMX_ADMA_ACM_SAI5_MCLK_SEL>,
+                         <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>,
+                         <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>,
+                         <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>,
+                         <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>,
+                         <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_PLL>,
+                         <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_SLV_BUS>,
+                         <&clk IMX_SC_R_AUDIO_PLL_1 IMX_SC_PM_CLK_MST_BUS>,
+                         <&sai5_lpcg 0>;
+       assigned-clock-parents = <&aud_pll_div0_lpcg 0>, <&aud_rec1_lpcg 0>;
+       assigned-clock-rates = <0>, <0>, <786432000>, <49152000>, <12288000>,
+                              <722534400>, <45158400>, <11289600>, <49152000>;
+};
+
 /* TODO: Apalis SATA1 */
 
 /* Apalis SPDIF1 */