net: amd-xgbe: Alter the port speed bit range
authorRaju Rangoju <Raju.Rangoju@amd.com>
Mon, 20 Dec 2021 13:54:27 +0000 (19:24 +0530)
committerJakub Kicinski <kuba@kernel.org>
Tue, 21 Dec 2021 02:42:39 +0000 (18:42 -0800)
Newer generation Hardware uses the slightly different
port speed bit widths, so alter the existing port speed
bit range to extend support to the newer generation hardware
while maintaining the backward compatibility with older
generation hardware.

The previously reserved bits are now being used which
then requires the adjustment to the BIT values, e.g.:

Before:
   PORT_PROPERTY_0[22:21] - Reserved
   PORT_PROPERTY_0[26:23] - Supported Speeds

After:
   PORT_PROPERTY_0[21] - Reserved
   PORT_PROPERTY_0[26:22] - Supported Speeds

To make this backwards compatible, the existing BIT
definitions for the port speeds are incremented by one
to maintain the original position.

Co-developed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com>
Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
drivers/net/ethernet/amd/xgbe/xgbe-common.h
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c

index 0075939..466273b 100644 (file)
 #define XP_PROP_0_PORT_ID_WIDTH                        8
 #define XP_PROP_0_PORT_MODE_INDEX              8
 #define XP_PROP_0_PORT_MODE_WIDTH              4
-#define XP_PROP_0_PORT_SPEEDS_INDEX            23
-#define XP_PROP_0_PORT_SPEEDS_WIDTH            4
+#define XP_PROP_0_PORT_SPEEDS_INDEX            22
+#define XP_PROP_0_PORT_SPEEDS_WIDTH            5
 #define XP_PROP_1_MAX_RX_DMA_INDEX             24
 #define XP_PROP_1_MAX_RX_DMA_WIDTH             5
 #define XP_PROP_1_MAX_RX_QUEUES_INDEX          8
index 2137690..2156600 100644 (file)
 #include "xgbe.h"
 #include "xgbe-common.h"
 
-#define XGBE_PHY_PORT_SPEED_100                BIT(0)
-#define XGBE_PHY_PORT_SPEED_1000       BIT(1)
-#define XGBE_PHY_PORT_SPEED_2500       BIT(2)
-#define XGBE_PHY_PORT_SPEED_10000      BIT(3)
+#define XGBE_PHY_PORT_SPEED_100                BIT(1)
+#define XGBE_PHY_PORT_SPEED_1000       BIT(2)
+#define XGBE_PHY_PORT_SPEED_2500       BIT(3)
+#define XGBE_PHY_PORT_SPEED_10000      BIT(4)
 
 #define XGBE_MUTEX_RELEASE             0x80000000