nvmem: Broaden the selection of NVMEM_SNVS_LPGPR
authorFabio Estevam <festevam@gmail.com>
Fri, 14 Jun 2019 14:32:20 +0000 (15:32 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 19 Jun 2019 17:35:51 +0000 (19:35 +0200)
The SNVS LPGR IP block is also found on other i.MX SoCs that
are not covered by the current SOC_IMX6 || SOC_IMX7D logic.

One example is the i.MX7ULP.

To avoid keep expanding the SoC logic selection, make it broader
by using the more generic ARCH_MXC symbol instead.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/nvmem/Kconfig

index d2b0374..c2ec750 100644 (file)
@@ -195,7 +195,7 @@ config MESON_MX_EFUSE
 
 config NVMEM_SNVS_LPGPR
        tristate "Support for Low Power General Purpose Register"
-       depends on SOC_IMX6 || SOC_IMX7D || COMPILE_TEST
+       depends on ARCH_MXC || COMPILE_TEST
        help
          This is a driver for Low Power General Purpose Register (LPGPR) available on
          i.MX6 and i.MX7 SoCs in Secure Non-Volatile Storage (SNVS) of this chip.