drm/i915/xe3lpd: Move async flip bit to PLANE_SURF register

The async flip moved from PLANE_CTL to PLANE_SURF for Xe3_LPD.

Bspec: 69853,69878
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Reviewed-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241028193015.3241858-7-clinton.a.taylor@intel.com

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 5b1f606..f3972dd 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1577,17 +1577,22 @@ skl_plane_async_flip(struct intel_dsb *dsb,
        struct intel_display *display = to_intel_display(plane->base.dev);
        enum plane_id plane_id = plane->id;
        enum pipe pipe = plane->pipe;
-       u32 plane_ctl = plane_state->ctl;
+       u32 plane_ctl = plane_state->ctl, plane_surf;
 
        plane_ctl |= skl_plane_ctl_crtc(crtc_state);
+       plane_surf = skl_plane_surf(plane_state, 0);
 
-       if (async_flip)
-               plane_ctl |= PLANE_CTL_ASYNC_FLIP;
+       if (async_flip) {
+               if (DISPLAY_VER(display) >= 30)
+                       plane_surf |= PLANE_SURF_ASYNC_UPDATE;
+               else
+                       plane_ctl |= PLANE_CTL_ASYNC_FLIP;
+       }
 
        intel_de_write_dsb(display, dsb, PLANE_CTL(pipe, plane_id),
                           plane_ctl);
        intel_de_write_dsb(display, dsb, PLANE_SURF(pipe, plane_id),
-                          skl_plane_surf(plane_state, 0));
+                          plane_surf);
 }
 
 static bool intel_format_is_p01x(u32 format)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
index 4ddcd7d..ff31a00 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
@@ -159,6 +159,7 @@
                                                        _PLANE_SURF_2_A, _PLANE_SURF_2_B)
 #define   PLANE_SURF_ADDR_MASK                 REG_GENMASK(31, 12)
 #define   PLANE_SURF_DECRYPT                   REG_BIT(2)
+#define   PLANE_SURF_ASYNC_UPDATE              REG_BIT(0)
 
 #define _PLANE_KEYMAX_1_A                      0x701a0
 #define _PLANE_KEYMAX_2_A                      0x702a0