drm/amd/display: Fix OPTC function pointers for DCN314
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Thu, 7 Jul 2022 14:19:53 +0000 (10:19 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 25 Jul 2022 21:14:58 +0000 (17:14 -0400)
[Why]
Access violation occurs when swapping between HDMI and FRL monitors
because we're missing the immediate_disable_crtc callback and it's
required for the DCN314 clk manager.

[How]
Update the table to match the DCN31 optc functions for ones that
should be the same:
- immediate_disable_crtc
- configure_crc

Reviewed-by: Michael Strauss <Michael.Strauss@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.c
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_optc.h
drivers/gpu/drm/amd/display/dc/dcn314/dcn314_optc.c

index c4304f2..2f7404a 100644 (file)
@@ -141,7 +141,7 @@ static bool optc31_disable_crtc(struct timing_generator *optc)
        return true;
 }
 
-static bool optc31_immediate_disable_crtc(struct timing_generator *optc)
+bool optc31_immediate_disable_crtc(struct timing_generator *optc)
 {
        struct optc *optc1 = DCN10TG_FROM_TG(optc);
 
index 3706e6f..30b81a4 100644 (file)
 
 void dcn31_timing_generator_init(struct optc *optc1);
 
+bool optc31_immediate_disable_crtc(struct timing_generator *optc);
+
 void optc31_set_drr(struct timing_generator *optc, const struct drr_params *params);
 
 void optc3_init_odm(struct timing_generator *optc);
index 436c354..3011f9e 100644 (file)
@@ -170,6 +170,7 @@ static struct timing_generator_funcs dcn314_tg_funcs = {
                .program_global_sync = optc1_program_global_sync,
                .enable_crtc = optc314_enable_crtc,
                .disable_crtc = optc314_disable_crtc,
+               .immediate_disable_crtc = optc31_immediate_disable_crtc,
                .phantom_crtc_post_enable = optc314_phantom_crtc_post_enable,
                /* used by enable_timing_synchronization. Not need for FPGA */
                .is_counter_moving = optc1_is_counter_moving,
@@ -204,7 +205,7 @@ static struct timing_generator_funcs dcn314_tg_funcs = {
                .clear_optc_underflow = optc1_clear_optc_underflow,
                .setup_global_swap_lock = NULL,
                .get_crc = optc1_get_crc,
-               .configure_crc = optc1_configure_crc,
+               .configure_crc = optc2_configure_crc,
                .set_dsc_config = optc3_set_dsc_config,
                .get_dsc_status = optc2_get_dsc_status,
                .set_dwb_source = NULL,