clk: renesas: r8a779[56]x: Add MLP clocks
authorAndrey Gusakov <andrey.gusakov@cogentembedded.com>
Wed, 29 Sep 2021 21:34:32 +0000 (00:34 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 15 Oct 2021 07:46:14 +0000 (09:46 +0200)
Add clocks for MLP modules on Renesas R-Car H3 and M3-W/N SoCs.

Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Link: https://lore.kernel.org/r/20210929213431.5275-1-nikita.yoush@cogentembedded.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c
drivers/clk/renesas/r8a7796-cpg-mssr.c
drivers/clk/renesas/r8a77965-cpg-mssr.c

index c32d2c6..d6b1d01 100644 (file)
@@ -229,6 +229,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("lvds",                  727,   R8A7795_CLK_S0D4),
        DEF_MOD("hdmi1",                 728,   R8A7795_CLK_HDMI),
        DEF_MOD("hdmi0",                 729,   R8A7795_CLK_HDMI),
+       DEF_MOD("mlp",                   802,   R8A7795_CLK_S2D1),
        DEF_MOD("vin7",                  804,   R8A7795_CLK_S0D2),
        DEF_MOD("vin6",                  805,   R8A7795_CLK_S0D2),
        DEF_MOD("vin5",                  806,   R8A7795_CLK_S0D2),
index 41593c1..9c22977 100644 (file)
@@ -207,6 +207,7 @@ static struct mssr_mod_clk r8a7796_mod_clks[] __initdata = {
        DEF_MOD("du0",                   724,   R8A7796_CLK_S2D1),
        DEF_MOD("lvds",                  727,   R8A7796_CLK_S2D1),
        DEF_MOD("hdmi0",                 729,   R8A7796_CLK_HDMI),
+       DEF_MOD("mlp",                   802,   R8A7796_CLK_S2D1),
        DEF_MOD("vin7",                  804,   R8A7796_CLK_S0D2),
        DEF_MOD("vin6",                  805,   R8A7796_CLK_S0D2),
        DEF_MOD("vin5",                  806,   R8A7796_CLK_S0D2),
index bc1be8b..7eee45a 100644 (file)
@@ -205,6 +205,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
        DEF_MOD("lvds",                 727,    R8A77965_CLK_S2D1),
        DEF_MOD("hdmi0",                729,    R8A77965_CLK_HDMI),
 
+       DEF_MOD("mlp",                  802,    R8A77965_CLK_S2D1),
        DEF_MOD("vin7",                 804,    R8A77965_CLK_S0D2),
        DEF_MOD("vin6",                 805,    R8A77965_CLK_S0D2),
        DEF_MOD("vin5",                 806,    R8A77965_CLK_S0D2),