drm/xe: Move XEHP_MTCFG_ADDR register definition to xe_regs.h
authorMichal Wajdeczko <michal.wajdeczko@intel.com>
Thu, 30 May 2024 13:35:23 +0000 (15:35 +0200)
committerMichal Wajdeczko <michal.wajdeczko@intel.com>
Thu, 30 May 2024 21:50:23 +0000 (23:50 +0200)
We should not define registers directly in the code while we have
dedicated files for all register definitions. Move XEHP_MTCFG_ADDR
to regs/xe_regs.h

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240530133527.1328-2-michal.wajdeczko@intel.com
drivers/gpu/drm/xe/regs/xe_regs.h
drivers/gpu/drm/xe/xe_mmio.c

index 722fb6d..23e33ec 100644 (file)
@@ -30,6 +30,9 @@
 #define XEHP_CLOCK_GATE_DIS                    XE_REG(0x101014)
 #define   SGSI_SIDECLK_DIS                     REG_BIT(17)
 
+#define XEHP_MTCFG_ADDR                                XE_REG(0x101800)
+#define   TILE_COUNT                           REG_GENMASK(15, 8)
+
 #define GGC                                    XE_REG(0x108040)
 #define   GMS_MASK                             REG_GENMASK(15, 8)
 #define   GGMS_MASK                            REG_GENMASK(7, 6)
index 248e93e..44bff10 100644 (file)
@@ -28,9 +28,6 @@
 #include "xe_sriov.h"
 #include "xe_tile.h"
 
-#define XEHP_MTCFG_ADDR                XE_REG(0x101800)
-#define TILE_COUNT             REG_GENMASK(15, 8)
-
 #define BAR_SIZE_SHIFT 20
 
 static void