drm/xe/xe3: Extend Wa_18041344222 to graphics IP versions 30.00 and 30.01

Apply WA 18041344222 to Xe3 LPG graphics IP versions 30.00 and 30.01 too.

Bspec: 56024
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Harish Chegondi <harish.chegondi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/7368f8059013424ac94f4a01c23f9c98a37b06dc.1757552915.git.harish.chegondi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index c1fec52..fa69bc7 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -679,6 +679,13 @@ static const struct xe_rtp_entry_sr engine_was[] = {
          XE_RTP_RULES(GRAPHICS_VERSION(3003), FUNC(xe_rtp_match_first_render_or_compute)),
          XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
        },
+       { XE_RTP_NAME("18041344222"),
+         XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
+                      FUNC(xe_rtp_match_first_render_or_compute),
+                      FUNC(xe_rtp_match_not_sriov_vf),
+                      FUNC(xe_rtp_match_gt_has_discontiguous_dss_groups)),
+         XE_RTP_ACTIONS(SET(TDL_CHICKEN, EUSTALL_PERF_SAMPLING_DISABLE))
+       },
 };
 
 static const struct xe_rtp_entry_sr lrc_was[] = {