pinctrl: denverton: Provide Interrupt Status register offset
authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Tue, 23 Jul 2019 15:56:31 +0000 (18:56 +0300)
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Wed, 7 Aug 2019 13:45:41 +0000 (16:45 +0300)
Since some of the GPIO controllers use different Interrupt Status offset,
it make sense to provide it explicitly in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
drivers/pinctrl/intel/pinctrl-denverton.c

index 3a4932b..fde83cd 100644 (file)
@@ -15,8 +15,9 @@
 #include "pinctrl-intel.h"
 
 #define DNV_PAD_OWN    0x020
-#define DNV_HOSTSW_OWN 0x0C0
 #define DNV_PADCFGLOCK 0x090
+#define DNV_HOSTSW_OWN 0x0C0
+#define DNV_GPI_IS     0x100
 #define DNV_GPI_IE     0x120
 
 #define DNV_GPP(n, s, e)                               \
@@ -32,6 +33,7 @@
                .padown_offset = DNV_PAD_OWN,           \
                .padcfglock_offset = DNV_PADCFGLOCK,    \
                .hostown_offset = DNV_HOSTSW_OWN,       \
+               .is_offset = DNV_GPI_IS,                \
                .ie_offset = DNV_GPI_IE,                \
                .pin_base = (s),                        \
                .npins = ((e) - (s) + 1),               \