drm/i915/icl: Add macros for MMIO of DSI transcoder registers

This patch adds _MMIO_DSI macros for accessing DSI
transcoder registers.

v2: Use _MMIO_TRANS() (Ville)

Credits-to: Jani N

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/3ab94184357d63f2f87b90ef6f5029fb19bef73a.1539613303.git.jani.nikula@intel.com

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 81f1c60..435be6f 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9769,6 +9769,10 @@ enum skl_power_gate {
 #define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c)    /* ports A and C only */
 #define _MMIO_MIPI(port, a, c) _MMIO(_MIPI_PORT(port, a, c))
 
+/* Gen11 DSI */
+#define _MMIO_DSI(tc, dsi0, dsi1)      _MMIO_TRANS((tc) - TRANSCODER_DSI_0, \
+                                                   dsi0, dsi1)
+
 #define MIPIO_TXESC_CLK_DIV1                   _MMIO(0x160004)
 #define  GLK_TX_ESC_CLK_DIV1_MASK                      0x3FF
 #define MIPIO_TXESC_CLK_DIV2                   _MMIO(0x160008)