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ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1
author
Kukjin Kim
<kgene.kim@samsung.com>
Sat, 12 May 2012 07:45:47 +0000
(16:45 +0900)
committer
Kukjin Kim
<kgene.kim@samsung.com>
Sat, 12 May 2012 23:31:53 +0000
(08:31 +0900)
It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/clock-exynos5.c
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diff --git
a/arch/arm/mach-exynos/clock-exynos5.c
b/arch/arm/mach-exynos/clock-exynos5.c
index
5cd7a8b
..
7ac6ff4
100644
(file)
--- a/
arch/arm/mach-exynos/clock-exynos5.c
+++ b/
arch/arm/mach-exynos/clock-exynos5.c
@@
-678,7
+678,7
@@
static struct clk exynos5_clk_pdma1 = {
.name = "dma",
.devname = "dma-pl330.1",
.enable = exynos5_clk_ip_fsys_ctrl,
- .ctrlbit = (1 <<
1
),
+ .ctrlbit = (1 <<
2
),
};
static struct clk exynos5_clk_mdma1 = {