drm/xe/hw_engine_group: Add helper to wait for dma fence jobs

This is a required feature for faulting long running jobs not to be
submitted while dma fence jobs are running on the hw engine group.

v2: Switch to lockdep_assert_held_write in worker, get a proper reference
    for the last fence (Matt Brost)

v3: Directly call dma_fence_put with the fence ref (Matt Brost)

Signed-off-by: Francois Dugast <francois.dugast@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240809155156.1955925-8-francois.dugast@intel.com

diff --git a/drivers/gpu/drm/xe/xe_hw_engine_group.c b/drivers/gpu/drm/xe/xe_hw_engine_group.c
index 8659332..8d3ddfc 100644 (file)
--- a/drivers/gpu/drm/xe/xe_hw_engine_group.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine_group.c
@@ -202,3 +202,36 @@ err_suspend:
        up_write(&group->mode_sem);
        return err;
 }
+
+/**
+ * xe_hw_engine_group_wait_for_dma_fence_jobs() - Wait for dma fence jobs to complete
+ * @group: The hw engine group
+ *
+ * This function is not meant to be called directly from a user IOCTL as dma_fence_wait()
+ * is not interruptible.
+ *
+ * Return: 0 on success,
+ *        -ETIME if waiting for one job failed
+ */
+static int xe_hw_engine_group_wait_for_dma_fence_jobs(struct xe_hw_engine_group *group)
+{
+       long timeout;
+       struct xe_exec_queue *q;
+       struct dma_fence *fence;
+
+       lockdep_assert_held_write(&group->mode_sem);
+
+       list_for_each_entry(q, &group->exec_queue_list, hw_engine_group_link) {
+               if (xe_vm_in_lr_mode(q->vm))
+                       continue;
+
+               fence = xe_exec_queue_last_fence_get_for_resume(q, q->vm);
+               timeout = dma_fence_wait(fence, false);
+               dma_fence_put(fence);
+
+               if (timeout < 0)
+                       return -ETIME;
+       }
+
+       return 0;
+}