ASoC: SOF: amd: remove unused variables
authorVijendar Mukunda <Vijendar.Mukunda@amd.com>
Mon, 3 Apr 2023 07:16:43 +0000 (12:46 +0530)
committerMark Brown <broonie@kernel.org>
Mon, 3 Apr 2023 11:15:33 +0000 (12:15 +0100)
Remove unused variables - i2s_mode, i2s_pin_config_offset from code.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://lore.kernel.org/r/20230403071651.919027-3-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/amd/acp.h
sound/soc/sof/amd/pci-rmb.c
sound/soc/sof/amd/pci-rn.c

index d7fc249..fd04e5a 100644 (file)
@@ -158,12 +158,10 @@ struct acp_dsp_stream {
 struct sof_amd_acp_desc {
        unsigned int rev;
        unsigned int host_bridge_id;
-       unsigned int i2s_mode;
        u32 pgfsm_base;
        u32 ext_intr_stat;
        u32 dsp_intr_base;
        u32 sram_pte_offset;
-       u32 i2s_pin_config_offset;
        u32 hw_semaphore_offset;
        u32 acp_clkmux_sel;
        u32 fusion_dsp_offset;
index d0a56e8..2b84f95 100644 (file)
@@ -31,12 +31,10 @@ static struct platform_device *dmic_dev;
 static const struct sof_amd_acp_desc rembrandt_chip_info = {
        .rev            = 6,
        .host_bridge_id = HOST_BRIDGE_RMB,
-       .i2s_mode       = 0x0a,
        .pgfsm_base     = ACP6X_PGFSM_BASE,
        .ext_intr_stat  = ACP6X_EXT_INTR_STAT,
        .dsp_intr_base  = ACP6X_DSP_SW_INTR_BASE,
        .sram_pte_offset = ACP6X_SRAM_PTE_OFFSET,
-       .i2s_pin_config_offset = ACP6X_I2S_PIN_CONFIG,
        .hw_semaphore_offset = ACP6X_AXI2DAGB_SEM_0,
        .acp_clkmux_sel = ACP6X_CLKMUX_SEL,
        .fusion_dsp_offset = ACP6X_DSP_FUSION_RUNSTALL,
index faab4c3..a17b155 100644 (file)
@@ -31,12 +31,10 @@ static struct platform_device *dmic_dev;
 static const struct sof_amd_acp_desc renoir_chip_info = {
        .rev            = 3,
        .host_bridge_id = HOST_BRIDGE_CZN,
-       .i2s_mode       = 0x04,
        .pgfsm_base     = ACP3X_PGFSM_BASE,
        .ext_intr_stat  = ACP3X_EXT_INTR_STAT,
        .dsp_intr_base  = ACP3X_DSP_SW_INTR_BASE,
        .sram_pte_offset = ACP3X_SRAM_PTE_OFFSET,
-       .i2s_pin_config_offset = ACP3X_I2S_PIN_CONFIG,
        .hw_semaphore_offset = ACP3X_AXI2DAGB_SEM_0,
        .acp_clkmux_sel = ACP3X_CLKMUX_SEL,
 };