arm64: dts: qcom: sm8250: remove mmcx regulator
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 29 Aug 2021 15:47:55 +0000 (18:47 +0300)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Fri, 15 Oct 2021 01:07:48 +0000 (20:07 -0500)
Switch dispcc and videocc into using MMCX domain directly. Drop the now
unused mmcx regulator.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210829154757.784699-7-dmitry.baryshkov@linaro.org
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 2796b27..86a4f80 100644 (file)
                reg = <0x0 0x80000000 0x0 0x0>;
        };
 
-       mmcx_reg: mmcx-reg {
-               compatible = "regulator-fixed-domain";
-               power-domains = <&rpmhpd SM8250_MMCX>;
-               required-opps = <&rpmhpd_opp_low_svs>;
-               regulator-name = "MMCX";
-       };
-
        pmu {
                compatible = "arm,armv8-pmuv3";
                interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
                        clocks = <&gcc GCC_VIDEO_AHB_CLK>,
                                 <&rpmhcc RPMH_CXO_CLK>,
                                 <&rpmhcc RPMH_CXO_CLK_A>;
-                       mmcx-supply = <&mmcx_reg>;
+                       power-domains = <&rpmhpd SM8250_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
                        clock-names = "iface", "bi_tcxo", "bi_tcxo_ao";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                dispcc: clock-controller@af00000 {
                        compatible = "qcom,sm8250-dispcc";
                        reg = <0 0x0af00000 0 0x10000>;
-                       mmcx-supply = <&mmcx_reg>;
+                       power-domains = <&rpmhpd SM8250_MMCX>;
+                       required-opps = <&rpmhpd_opp_low_svs>;
                        clocks = <&rpmhcc RPMH_CXO_CLK>,
                                 <&dsi0_phy 0>,
                                 <&dsi0_phy 1>,