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memory: pl353: fix mask of ECC page_size config register
author
gexueyuan
<gexueyuan@gmail.com>
Wed, 31 Mar 2021 03:10:56 +0000
(11:10 +0800)
committer
Krzysztof Kozlowski
<krzysztof.kozlowski@canonical.com>
Mon, 5 Apr 2021 14:15:58 +0000
(16:15 +0200)
The mask for page size of ECC Configuration Register should be 0x3,
according to the datasheet of PL353 smc.
Fixes:
fee10bd22678
("memory: pl353: Add driver for arm pl353 static memory controller")
Signed-off-by: gexueyuan <gexueyuan@gmail.com>
Link:
https://lore.kernel.org/r/20210331031056.5326-1-gexueyuan@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
drivers/memory/pl353-smc.c
patch
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diff --git
a/drivers/memory/pl353-smc.c
b/drivers/memory/pl353-smc.c
index
3b5b104
..
9c0a284
100644
(file)
--- a/
drivers/memory/pl353-smc.c
+++ b/
drivers/memory/pl353-smc.c
@@
-63,7
+63,7
@@
/* ECC memory config register specific constants */
#define PL353_SMC_ECC_MEMCFG_MODE_MASK 0xC
#define PL353_SMC_ECC_MEMCFG_MODE_SHIFT 2
-#define PL353_SMC_ECC_MEMCFG_PGSIZE_MASK 0x
C
+#define PL353_SMC_ECC_MEMCFG_PGSIZE_MASK 0x
3
#define PL353_SMC_DC_UPT_NAND_REGS ((4 << 23) | /* CS: NAND chip */ \
(2 << 21)) /* UpdateRegs operation */