ath9k: clear bb filter calibration power threshold
authorMiaoqing Pan <miaoqing@codeaurora.org>
Thu, 18 Feb 2016 09:20:02 +0000 (17:20 +0800)
committerKalle Valo <kvalo@qca.qualcomm.com>
Thu, 3 Mar 2016 17:27:17 +0000 (19:27 +0200)
JP WiFi certification for bandwidth of channel 14 failed, the OBW
is lower than the requirement. Clear the bb filter calibration power
threshold to increase OBW(+2). The fix only for qca9531 chip now.

Signed-off-by: Miaoqing Pan <miaoqing@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
drivers/net/wireless/ath/ath9k/ar9003_phy.c
drivers/net/wireless/ath/ath9k/ar9003_phy.h

index abd9646..06c1ca6 100644 (file)
@@ -976,9 +976,14 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
        /*
         * JAPAN regulatory.
         */
-       if (chan->channel == 2484)
+       if (chan->channel == 2484) {
                ar9003_hw_prog_ini(ah, &ah->iniCckfirJapan2484, 1);
 
+               if (AR_SREV_9531(ah))
+                       REG_RMW_FIELD(ah, AR_PHY_FCAL_2_0,
+                                     AR_PHY_FLC_PWR_THRESH, 0);
+       }
+
        ah->modes_index = modesIndex;
        ar9003_hw_override_ini(ah);
        ar9003_hw_set_channel_regs(ah, chan);
index c5f8bc4..566da78 100644 (file)
 #define AR_PHY_ADDAC_PARA_CTL    (AR_SM_BASE + 0x150)
 #define AR_PHY_XPA_CFG           (AR_SM_BASE + 0x158)
 
+#define AR_PHY_FLC_PWR_THRESH          7
+#define AR_PHY_FLC_PWR_THRESH_S                0
+
 #define AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW  3
 #define AR_PHY_FRAME_CTL_CF_OVERLAP_WINDOW_S    0