drm/amdgpu: fix avg vs input power reporting on smu7

Hawaii, Bonaire, Fiji, and Tonga support average power, the others
support current power.

Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
index b1a8799..aa91730 100644 (file)
--- a/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu7_hwmgr.c
@@ -3999,6 +3999,7 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx,
        uint32_t sclk, mclk, activity_percent;
        uint32_t offset, val_vid;
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+       struct amdgpu_device *adev = hwmgr->adev;
 
        /* size must be at least 4 bytes for all sensors */
        if (*size < 4)
@@ -4042,7 +4043,21 @@ static int smu7_read_sensor(struct pp_hwmgr *hwmgr, int idx,
                *size = 4;
                return 0;
        case AMDGPU_PP_SENSOR_GPU_INPUT_POWER:
-               return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
+               if ((adev->asic_type != CHIP_HAWAII) &&
+                   (adev->asic_type != CHIP_BONAIRE) &&
+                   (adev->asic_type != CHIP_FIJI) &&
+                   (adev->asic_type != CHIP_TONGA))
+                       return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
+               else
+                       return -EOPNOTSUPP;
+       case AMDGPU_PP_SENSOR_GPU_AVG_POWER:
+               if ((adev->asic_type != CHIP_HAWAII) &&
+                   (adev->asic_type != CHIP_BONAIRE) &&
+                   (adev->asic_type != CHIP_FIJI) &&
+                   (adev->asic_type != CHIP_TONGA))
+                       return -EOPNOTSUPP;
+               else
+                       return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
        case AMDGPU_PP_SENSOR_VDDGFX:
                if ((data->vr_config & VRCONF_VDDGFX_MASK) ==
                    (VR_SVI2_PLANE_2 << VRCONF_VDDGFX_SHIFT))