drm/amdgpu: rework SR-IOV virtual display handling
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 19 Jul 2022 16:13:08 +0000 (12:13 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 15 Nov 2022 16:51:32 +0000 (11:51 -0500)
virtual display is enabled unconditionally in SR-IOV, but
without specifying the virtual_display module, the number
of crtcs defaults to 0.  Set a single display by default
for SR-IOV if the virtual_display parameter is not set.
Only enable virtual display by default on SR-IOV on asics
which actually have display hardware.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu.h
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
drivers/gpu/drm/amd/amdgpu/vi.c

index 9999c18..1179028 100644 (file)
@@ -1122,6 +1122,8 @@ void amdgpu_device_indirect_wreg64(struct amdgpu_device *adev,
 bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type);
 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev);
 
+void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev);
+
 int amdgpu_device_pre_asic_reset(struct amdgpu_device *adev,
                                 struct amdgpu_reset_context *reset_context);
 
index 5b9f992..72d8030 100644 (file)
@@ -1915,6 +1915,16 @@ static void amdgpu_device_enable_virtual_display(struct amdgpu_device *adev)
        }
 }
 
+void amdgpu_device_set_sriov_virtual_display(struct amdgpu_device *adev)
+{
+       if (amdgpu_sriov_vf(adev) && !adev->enable_virtual_display) {
+               adev->mode_info.num_crtc = 1;
+               adev->enable_virtual_display = true;
+               DRM_INFO("virtual_display:%d, num_crtc:%d\n",
+                        adev->enable_virtual_display, adev->mode_info.num_crtc);
+       }
+}
+
 /**
  * amdgpu_device_parse_gpu_info_fw - parse gpu info firmware
  *
@@ -3347,8 +3357,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
  */
 bool amdgpu_device_has_dc_support(struct amdgpu_device *adev)
 {
-       if (amdgpu_sriov_vf(adev) ||
-           adev->enable_virtual_display ||
+       if (adev->enable_virtual_display ||
            (adev->harvest_ip_mask & AMD_HARVEST_IP_DMU_MASK))
                return false;
 
index 5ea9afa..104de4b 100644 (file)
@@ -1702,9 +1702,15 @@ static int amdgpu_discovery_set_smu_ip_blocks(struct amdgpu_device *adev)
        return 0;
 }
 
+static void amdgpu_discovery_set_sriov_display(struct amdgpu_device *adev)
+{
+       amdgpu_device_set_sriov_virtual_display(adev);
+       amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
+}
+
 static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
 {
-       if (adev->enable_virtual_display || amdgpu_sriov_vf(adev)) {
+       if (adev->enable_virtual_display) {
                amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
                return 0;
        }
@@ -1732,7 +1738,10 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
                case IP_VERSION(3, 1, 6):
                case IP_VERSION(3, 2, 0):
                case IP_VERSION(3, 2, 1):
-                       amdgpu_device_ip_block_add(adev, &dm_ip_block);
+                       if (amdgpu_sriov_vf(adev))
+                               amdgpu_discovery_set_sriov_display(adev);
+                       else
+                               amdgpu_device_ip_block_add(adev, &dm_ip_block);
                        break;
                default:
                        dev_err(adev->dev,
@@ -1745,7 +1754,10 @@ static int amdgpu_discovery_set_display_ip_blocks(struct amdgpu_device *adev)
                case IP_VERSION(12, 0, 0):
                case IP_VERSION(12, 0, 1):
                case IP_VERSION(12, 1, 0):
-                       amdgpu_device_ip_block_add(adev, &dm_ip_block);
+                       if (amdgpu_sriov_vf(adev))
+                               amdgpu_discovery_set_sriov_display(adev);
+                       else
+                               amdgpu_device_ip_block_add(adev, &dm_ip_block);
                        break;
                default:
                        dev_err(adev->dev,
index f6ffd7c..12ef782 100644 (file)
@@ -2111,6 +2111,8 @@ void vi_set_virt_ops(struct amdgpu_device *adev)
 
 int vi_set_ip_blocks(struct amdgpu_device *adev)
 {
+       amdgpu_device_set_sriov_virtual_display(adev);
+
        switch (adev->asic_type) {
        case CHIP_TOPAZ:
                /* topaz has no DCE, UVD, VCE */
@@ -2130,7 +2132,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
                amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
-               if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
+               if (adev->enable_virtual_display)
                        amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
 #if defined(CONFIG_DRM_AMD_DC)
                else if (amdgpu_device_has_dc_support(adev))
@@ -2150,7 +2152,7 @@ int vi_set_ip_blocks(struct amdgpu_device *adev)
                amdgpu_device_ip_block_add(adev, &gfx_v8_0_ip_block);
                amdgpu_device_ip_block_add(adev, &sdma_v3_0_ip_block);
                amdgpu_device_ip_block_add(adev, &pp_smu_ip_block);
-               if (adev->enable_virtual_display || amdgpu_sriov_vf(adev))
+               if (adev->enable_virtual_display)
                        amdgpu_device_ip_block_add(adev, &amdgpu_vkms_ip_block);
 #if defined(CONFIG_DRM_AMD_DC)
                else if (amdgpu_device_has_dc_support(adev))