net: dsa: b53: switch to using phylink_generic_validate()
authorRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
Tue, 22 Feb 2022 10:16:13 +0000 (10:16 +0000)
committerDavid S. Miller <davem@davemloft.net>
Tue, 22 Feb 2022 11:03:02 +0000 (11:03 +0000)
Switch the Broadcom b53 driver to using the phylink_generic_validate()
implementation by removing its own .phylink_validate method and
associated code.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/dsa/b53/b53_common.c
drivers/net/dsa/b53/b53_priv.h
drivers/net/dsa/b53/b53_serdes.c
drivers/net/dsa/b53/b53_serdes.h
drivers/net/dsa/b53/b53_srab.c

index a637e44..50a372d 100644 (file)
@@ -1309,48 +1309,6 @@ void b53_port_event(struct dsa_switch *ds, int port)
 }
 EXPORT_SYMBOL(b53_port_event);
 
-void b53_phylink_validate(struct dsa_switch *ds, int port,
-                         unsigned long *supported,
-                         struct phylink_link_state *state)
-{
-       struct b53_device *dev = ds->priv;
-       __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
-
-       if (dev->ops->serdes_phylink_validate)
-               dev->ops->serdes_phylink_validate(dev, port, mask, state);
-
-       /* Allow all the expected bits */
-       phylink_set(mask, Autoneg);
-       phylink_set_port_modes(mask);
-       phylink_set(mask, Pause);
-       phylink_set(mask, Asym_Pause);
-
-       /* With the exclusion of 5325/5365, MII, Reverse MII and 802.3z, we
-        * support Gigabit, including Half duplex.
-        *
-        * FIXME: this is weird - 802.3z is always Gigabit, but we exclude
-        * it here. Why? This makes no sense.
-        */
-       if (!(state->interface == PHY_INTERFACE_MODE_MII ||
-             state->interface == PHY_INTERFACE_MODE_REVMII ||
-             phy_interface_mode_is_8023z(state->interface) ||
-             is5325(dev) || is5365(dev))) {
-               phylink_set(mask, 1000baseT_Full);
-               phylink_set(mask, 1000baseT_Half);
-       }
-
-       if (!phy_interface_mode_is_8023z(state->interface)) {
-               phylink_set(mask, 10baseT_Half);
-               phylink_set(mask, 10baseT_Full);
-               phylink_set(mask, 100baseT_Half);
-               phylink_set(mask, 100baseT_Full);
-       }
-
-       linkmode_and(supported, supported, mask);
-       linkmode_and(state->advertising, state->advertising, mask);
-}
-EXPORT_SYMBOL(b53_phylink_validate);
-
 static void b53_phylink_get_caps(struct dsa_switch *ds, int port,
                                 struct phylink_config *config)
 {
@@ -1362,6 +1320,13 @@ static void b53_phylink_get_caps(struct dsa_switch *ds, int port,
        /* These switches appear to support MII and RevMII too, but beyond
         * this, the code gives very few clues. FIXME: We probably need more
         * interface modes here.
+        *
+        * According to b53_srab_mux_init(), ports 3..5 can support:
+        *  SGMII, MII, GMII, RGMII or INTERNAL depending on the MUX setting.
+        * However, the interface mode read from the MUX configuration is
+        * not passed back to DSA, so phylink uses NA.
+        * DT can specify RGMII for ports 0, 1.
+        * For MDIO, port 8 can be RGMII_TXID.
         */
        __set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
        __set_bit(PHY_INTERFACE_MODE_REVMII, config->supported_interfaces);
@@ -1369,7 +1334,12 @@ static void b53_phylink_get_caps(struct dsa_switch *ds, int port,
        config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
                MAC_10 | MAC_100;
 
-       /* 5325/5365 are not capable of gigabit speeds, everything else is */
+       /* 5325/5365 are not capable of gigabit speeds, everything else is.
+        * Note: the original code also exclulded Gigagbit for MII, RevMII
+        * and 802.3z modes. MII and RevMII are not able to work above 100M,
+        * so will be excluded by the generic validator implementation.
+        * However, the exclusion of Gigabit for 802.3z just seems wrong.
+        */
        if (!(is5325(dev) || is5365(dev)))
                config->mac_capabilities |= MAC_1000;
 
@@ -2288,7 +2258,6 @@ static const struct dsa_switch_ops b53_switch_ops = {
        .phy_write              = b53_phy_write16,
        .adjust_link            = b53_adjust_link,
        .phylink_get_caps       = b53_phylink_get_caps,
-       .phylink_validate       = b53_phylink_validate,
        .phylink_mac_link_state = b53_phylink_mac_link_state,
        .phylink_mac_config     = b53_phylink_mac_config,
        .phylink_mac_an_restart = b53_phylink_mac_an_restart,
index b9d1b48..a6b339f 100644 (file)
@@ -58,9 +58,6 @@ struct b53_io_ops {
        void (*serdes_link_set)(struct b53_device *dev, int port,
                                unsigned int mode, phy_interface_t interface,
                                bool link_up);
-       void (*serdes_phylink_validate)(struct b53_device *dev, int port,
-                                       unsigned long *supported,
-                                       struct phylink_link_state *state);
 };
 
 #define B53_INVALID_LANE       0xff
@@ -339,9 +336,6 @@ int b53_br_flags(struct dsa_switch *ds, int port,
                 struct netlink_ext_ack *extack);
 int b53_setup_devlink_resources(struct dsa_switch *ds);
 void b53_port_event(struct dsa_switch *ds, int port);
-void b53_phylink_validate(struct dsa_switch *ds, int port,
-                         unsigned long *supported,
-                         struct phylink_link_state *state);
 int b53_phylink_mac_link_state(struct dsa_switch *ds, int port,
                               struct phylink_link_state *state);
 void b53_phylink_mac_config(struct dsa_switch *ds, int port,
index e4cc644..555e5b3 100644 (file)
@@ -158,28 +158,6 @@ void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,
 }
 EXPORT_SYMBOL(b53_serdes_link_set);
 
-void b53_serdes_phylink_validate(struct b53_device *dev, int port,
-                                unsigned long *supported,
-                                struct phylink_link_state *state)
-{
-       u8 lane = b53_serdes_map_lane(dev, port);
-
-       if (lane == B53_INVALID_LANE)
-               return;
-
-       switch (lane) {
-       case 0:
-               phylink_set(supported, 2500baseX_Full);
-               fallthrough;
-       case 1:
-               phylink_set(supported, 1000baseX_Full);
-               break;
-       default:
-               break;
-       }
-}
-EXPORT_SYMBOL(b53_serdes_phylink_validate);
-
 void b53_serdes_phylink_get_caps(struct b53_device *dev, int port,
                                 struct phylink_config *config)
 {
index 8fa24f7..f47d5ca 100644 (file)
@@ -117,9 +117,6 @@ void b53_serdes_link_set(struct b53_device *dev, int port, unsigned int mode,
                         phy_interface_t interface, bool link_up);
 void b53_serdes_phylink_get_caps(struct b53_device *dev, int port,
                                 struct phylink_config *config);
-void b53_serdes_phylink_validate(struct b53_device *dev, int port,
-                               unsigned long *supported,
-                               struct phylink_link_state *state);
 #if IS_ENABLED(CONFIG_B53_SERDES)
 int b53_serdes_init(struct b53_device *dev, int port);
 #else
index 7d72f3b..c51b716 100644 (file)
@@ -496,7 +496,6 @@ static const struct b53_io_ops b53_srab_ops = {
        .serdes_config = b53_serdes_config,
        .serdes_an_restart = b53_serdes_an_restart,
        .serdes_link_set = b53_serdes_link_set,
-       .serdes_phylink_validate = b53_serdes_phylink_validate,
 #endif
 };