cxgb4: collect serial config version from register
authorRahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Tue, 9 Feb 2021 05:52:38 +0000 (11:22 +0530)
committerDavid S. Miller <davem@davemloft.net>
Wed, 10 Feb 2021 23:05:40 +0000 (15:05 -0800)
Collect serial config version information directly from an internal
register, instead of explicitly resizing VPD.

v2:
- Add comments on info stored in PCIE_STATIC_SPARE2 register.

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Reviewed-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Alexander Duyck <alexanderduyck@fb.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/chelsio/cxgb4/cudbg_entity.h
drivers/net/ethernet/chelsio/cxgb4/cudbg_lib.c
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h

index 876f90e..d5218e7 100644 (file)
@@ -220,9 +220,6 @@ struct cudbg_mps_tcam {
        u8 reserved[2];
 };
 
-#define CUDBG_VPD_PF_SIZE 0x800
-#define CUDBG_SCFG_VER_ADDR 0x06
-#define CUDBG_SCFG_VER_LEN 4
 #define CUDBG_VPD_VER_ADDR 0x18c7
 #define CUDBG_VPD_VER_LEN 2
 
index 75474f8..6c85a10 100644 (file)
@@ -2686,10 +2686,10 @@ int cudbg_collect_vpd_data(struct cudbg_init *pdbg_init,
        struct adapter *padap = pdbg_init->adap;
        struct cudbg_buffer temp_buff = { 0 };
        char vpd_str[CUDBG_VPD_VER_LEN + 1];
-       u32 scfg_vers, vpd_vers, fw_vers;
        struct cudbg_vpd_data *vpd_data;
        struct vpd_params vpd = { 0 };
-       int rc, ret;
+       u32 vpd_vers, fw_vers;
+       int rc;
 
        rc = t4_get_raw_vpd_params(padap, &vpd);
        if (rc)
@@ -2699,24 +2699,6 @@ int cudbg_collect_vpd_data(struct cudbg_init *pdbg_init,
        if (rc)
                return rc;
 
-       /* Serial Configuration Version is located beyond the PF's vpd size.
-        * Temporarily give access to entire EEPROM to get it.
-        */
-       rc = pci_set_vpd_size(padap->pdev, EEPROMVSIZE);
-       if (rc < 0)
-               return rc;
-
-       ret = cudbg_read_vpd_reg(padap, CUDBG_SCFG_VER_ADDR, CUDBG_SCFG_VER_LEN,
-                                &scfg_vers);
-
-       /* Restore back to original PF's vpd size */
-       rc = pci_set_vpd_size(padap->pdev, CUDBG_VPD_PF_SIZE);
-       if (rc < 0)
-               return rc;
-
-       if (ret)
-               return ret;
-
        rc = cudbg_read_vpd_reg(padap, CUDBG_VPD_VER_ADDR, CUDBG_VPD_VER_LEN,
                                vpd_str);
        if (rc)
@@ -2737,7 +2719,7 @@ int cudbg_collect_vpd_data(struct cudbg_init *pdbg_init,
        memcpy(vpd_data->bn, vpd.pn, PN_LEN + 1);
        memcpy(vpd_data->na, vpd.na, MACADDR_LEN + 1);
        memcpy(vpd_data->mn, vpd.id, ID_LEN + 1);
-       vpd_data->scfg_vers = scfg_vers;
+       vpd_data->scfg_vers = t4_read_reg(padap, PCIE_STATIC_SPARE2_A);
        vpd_data->vpd_vers = vpd_vers;
        vpd_data->fw_major = FW_HDR_FW_VER_MAJOR_G(fw_vers);
        vpd_data->fw_minor = FW_HDR_FW_VER_MINOR_G(fw_vers);
index b11a172..695916b 100644 (file)
 #define TDUE_V(x) ((x) << TDUE_S)
 #define TDUE_F    TDUE_V(1U)
 
+/* SPARE2 register contains 32-bit value at offset 0x6 in Serial INIT
+ * Configuration flashed on EEPROM. This value corresponds to 32-bit
+ * Serial Configuration Version information.
+ */
+#define PCIE_STATIC_SPARE2_A   0x5bfc
+
 /* registers for module MC */
 #define MC_INT_CAUSE_A         0x7518
 #define MC_P_INT_CAUSE_A       0x41318