regmap = device_node_to_regmap(node);
if (IS_ERR(regmap)) {
- pr_err("Cannot find regmap for %pOF: %ld\n", node,
- PTR_ERR(regmap));
+ pr_err("Cannot find regmap for %pOF: %pe\n", node, regmap);
return PTR_ERR(regmap);
}
clk = mtk_clk_register_cpumux(mux, regmap);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- mux->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", mux->name, clk);
continue;
}
rc->rate);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- rc->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", rc->name, clk);
continue;
}
CLK_SET_RATE_PARENT, ff->mult, ff->div);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- ff->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", ff->name, clk);
continue;
}
regmap = device_node_to_regmap(node);
if (IS_ERR(regmap)) {
- pr_err("Cannot find regmap for %pOF: %ld\n", node,
- PTR_ERR(regmap));
+ pr_err("Cannot find regmap for %pOF: %pe\n", node, regmap);
return PTR_ERR(regmap);
}
gate->shift, gate->ops, gate->flags, dev);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- gate->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", gate->name, clk);
continue;
}
clk = mtk_clk_register_composite(mc, base, lock);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- mc->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", mc->name, clk);
continue;
}
mcd->div_width, mcd->clk_divider_flags, lock);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- mcd->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", mcd->name, clk);
continue;
}
regmap = device_node_to_regmap(node);
if (IS_ERR(regmap)) {
- pr_err("Cannot find regmap for %pOF: %ld\n", node,
- PTR_ERR(regmap));
+ pr_err("Cannot find regmap for %pOF: %pe\n", node, regmap);
return PTR_ERR(regmap);
}
clk = mtk_clk_register_mux(mux, regmap, lock);
if (IS_ERR(clk)) {
- pr_err("Failed to register clk %s: %ld\n",
- mux->name, PTR_ERR(clk));
+ pr_err("Failed to register clk %s: %pe\n", mux->name, clk);
continue;
}