net: phylink: Add 25G BASE-R support

Add 25gbase-r interface type and speed to phylink.
This is needed for the Sparx5 switch.

Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index bb9eeb7..8ce8db4 100644 (file)
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -312,6 +312,11 @@ static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
                        phylink_set(pl->supported, 5000baseT_Full);
                        break;
 
+               case PHY_INTERFACE_MODE_25GBASER:
+                       phylink_set(pl->supported, 25000baseCR_Full);
+                       phylink_set(pl->supported, 25000baseKR_Full);
+                       phylink_set(pl->supported, 25000baseSR_Full);
+                       fallthrough;
                case PHY_INTERFACE_MODE_USXGMII:
                case PHY_INTERFACE_MODE_10GKR:
                case PHY_INTERFACE_MODE_10GBASER: