drm/msm: fix 32b build warns
authorRob Clark <robdclark@chromium.org>
Tue, 29 Sep 2020 00:19:12 +0000 (17:19 -0700)
committerDave Airlie <airlied@redhat.com>
Tue, 29 Sep 2020 00:20:51 +0000 (10:20 +1000)
Neither of these code-paths apply to older 32b devices, but it is rude
to introduce warnings.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200929001925.2916984-1-robdclark@gmail.com
drivers/gpu/drm/msm/adreno/adreno_gpu.c
drivers/gpu/drm/msm/dsi/pll/dsi_pll_7nm.c

index fd8f491..458b5b2 100644 (file)
@@ -209,7 +209,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu,
        size = iommu->geometry.aperture_end - start + 1;
 
        aspace = msm_gem_address_space_create(mmu, "gpu",
-               start & GENMASK(48, 0), size);
+               start & GENMASK_ULL(48, 0), size);
 
        if (IS_ERR(aspace) && !IS_ERR(mmu))
                mmu->funcs->destroy(mmu);
index 029cc8b..de0dfb8 100644 (file)
@@ -879,7 +879,7 @@ struct msm_dsi_pll *msm_dsi_pll_7nm_init(struct platform_device *pdev, int id)
        pll->max_rate = 3500000000UL;
        if (pll->type == MSM_DSI_PHY_7NM_V4_1) {
                pll->min_rate = 600000000UL;
-               pll->max_rate = 5000000000UL;
+               pll->max_rate = (unsigned long)5000000000ULL;
                /* workaround for max rate overflowing on 32-bit builds: */
                pll->max_rate = max(pll->max_rate, 0xffffffffUL);
        }