ice: refactor ice_sbq_msg_dev enum

Rename ice_sbq_msg_dev to ice_sbq_dev_id to reflect the meaning of this
type more precisely. This enum type describes RDA (Remote Device Access)
client ids, accessible over SB (Side Band) interface.
Rename enum elements to make a driver namespace more cleaner and
consistent with other definitions within SB
Remove unused 'rmn_x' entries, specific to unsupported E824 device.
Adjust clients '2' and '13' names (phy_0 and phy_0_peer respectively) to
be compliant with EAS doc. According to the specification, regardless of
the complex entity (single or dual), when accessing its own ports,
they're accessed always as 'phy_0' client. And referred as 'phy_0_peer'
when handling ports connected to the other complex.

Reviewed-by: Simon Horman <horms@kernel.org>
Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Co-developed-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>

diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c
index e725b78..bec6b3e 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_common.c
+++ b/drivers/net/ethernet/intel/ice/ice_common.c
@@ -3434,7 +3434,7 @@ int ice_aq_get_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port,
        msg.msg_addr_low = lower_16_bits(reg_offset);
        msg.msg_addr_high = receiver_id;
        msg.opcode = ice_sbq_msg_rd;
-       msg.dest_dev = rmn_0;
+       msg.dest_dev = ice_sbq_dev_phy_0;
 
        err = ice_sbq_rw_reg(hw, &msg, flag);
        if (err)

diff --git a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
index a5df081..eb1893d 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
+++ b/drivers/net/ethernet/intel/ice/ice_ptp_hw.c
@@ -240,7 +240,7 @@ static int ice_read_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 *val)
 {
        struct ice_sbq_msg_input cgu_msg = {
                .opcode = ice_sbq_msg_rd,
-               .dest_dev = cgu,
+               .dest_dev = ice_sbq_dev_cgu,
                .msg_addr_low = addr
        };
        int err;
@@ -272,7 +272,7 @@ static int ice_write_cgu_reg_e82x(struct ice_hw *hw, u32 addr, u32 val)
 {
        struct ice_sbq_msg_input cgu_msg = {
                .opcode = ice_sbq_msg_wr,
-               .dest_dev = cgu,
+               .dest_dev = ice_sbq_dev_cgu,
                .msg_addr_low = addr,
                .data = val
        };
@@ -919,16 +919,16 @@ static void ice_ptp_cfg_sync_delay(const struct ice_hw *hw, u32 delay)
  *
  * Return: destination sideband queue PHY device.
  */
-static enum ice_sbq_msg_dev ice_ptp_get_dest_dev_e825(struct ice_hw *hw,
-                                                     u8 port)
+static enum ice_sbq_dev_id ice_ptp_get_dest_dev_e825(struct ice_hw *hw,
+                                                    u8 port)
 {
        /* On a single complex E825, PHY 0 is always destination device phy_0
         * and PHY 1 is phy_0_peer.
         */
        if (port >= hw->ptp.ports_per_phy)
-               return eth56g_phy_1;
+               return ice_sbq_dev_phy_0_peer;
        else
-               return eth56g_phy_0;
+               return ice_sbq_dev_phy_0;
 }
 
 /**
@@ -2758,7 +2758,7 @@ static void ice_fill_phy_msg_e82x(struct ice_hw *hw,
                msg->msg_addr_high = P_Q1_H(P_4_BASE + offset, phy_port);
        }
 
-       msg->dest_dev = rmn_0;
+       msg->dest_dev = ice_sbq_dev_phy_0;
 }
 
 /**
@@ -3081,7 +3081,7 @@ static int ice_fill_quad_msg_e82x(struct ice_hw *hw,
        if (quad >= ICE_GET_QUAD_NUM(hw->ptp.num_lports))
                return -EINVAL;
 
-       msg->dest_dev = rmn_0;
+       msg->dest_dev = ice_sbq_dev_phy_0;
 
        if (!(quad % ICE_GET_QUAD_NUM(hw->ptp.ports_per_phy)))
                addr = Q_0_BASE + offset;
@@ -4800,7 +4800,7 @@ static int ice_read_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 *val)
        msg.msg_addr_low = lower_16_bits(addr);
        msg.msg_addr_high = upper_16_bits(addr);
        msg.opcode = ice_sbq_msg_rd;
-       msg.dest_dev = rmn_0;
+       msg.dest_dev = ice_sbq_dev_phy_0;
 
        err = ice_sbq_rw_reg(hw, &msg, ICE_AQ_FLAG_RD);
        if (err) {
@@ -4830,7 +4830,7 @@ static int ice_write_phy_reg_e810(struct ice_hw *hw, u32 addr, u32 val)
        msg.msg_addr_low = lower_16_bits(addr);
        msg.msg_addr_high = upper_16_bits(addr);
        msg.opcode = ice_sbq_msg_wr;
-       msg.dest_dev = rmn_0;
+       msg.dest_dev = ice_sbq_dev_phy_0;
        msg.data = val;
 
        err = ice_sbq_rw_reg(hw, &msg, ICE_AQ_FLAG_RD);

diff --git a/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h b/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h
index 3b0054f..183dd54 100644 (file)
--- a/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h
+++ b/drivers/net/ethernet/intel/ice/ice_sbq_cmd.h
@@ -46,13 +46,10 @@ struct ice_sbq_evt_desc {
        u8 data[24];
 };
 
-enum ice_sbq_msg_dev {
-       eth56g_phy_0    = 0x02,
-       rmn_0           = 0x02,
-       rmn_1           = 0x03,
-       rmn_2           = 0x04,
-       cgu             = 0x06,
-       eth56g_phy_1    = 0x0D,
+enum ice_sbq_dev_id {
+       ice_sbq_dev_phy_0       = 0x02,
+       ice_sbq_dev_cgu         = 0x06,
+       ice_sbq_dev_phy_0_peer  = 0x0D,
 };
 
 enum ice_sbq_msg_opcode {