drm/dsc: use rc_model_size from DSC config for PPS
authorJani Nikula <jani.nikula@intel.com>
Tue, 8 Dec 2020 12:33:50 +0000 (14:33 +0200)
committerJani Nikula <jani.nikula@intel.com>
Thu, 10 Dec 2020 08:48:19 +0000 (10:48 +0200)
The PPS is supposed to reflect the DSC config instead of hard coding the
rc_model_size. Make it so.

Currently all users of drm_dsc_pps_payload_pack() hard code the size to
8192 also in the DSC config, so this change should have no impact, other
than allowing the drivers to use other sizes as needed.

Cc: Alex Deucher <alexdeucher@gmail.com>
Cc: Harry Wentland <hwentlan@amd.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c3246aff585efcd728ee3dc96f52db5e46f6a162.1607429866.git.jani.nikula@intel.com
drivers/gpu/drm/drm_dsc.c

index 4a475d9..09afbc0 100644 (file)
@@ -186,8 +186,7 @@ void drm_dsc_pps_payload_pack(struct drm_dsc_picture_parameter_set *pps_payload,
        pps_payload->flatness_max_qp = dsc_cfg->flatness_max_qp;
 
        /* PPS 38, 39 */
-       pps_payload->rc_model_size =
-               cpu_to_be16(DSC_RC_MODEL_SIZE_CONST);
+       pps_payload->rc_model_size = cpu_to_be16(dsc_cfg->rc_model_size);
 
        /* PPS 40 */
        pps_payload->rc_edge_factor = DSC_RC_EDGE_FACTOR_CONST;