drm/amd/display: Set WM set A to 0 if full pstate not supported

[Why]
If full pstate is not supported, we should set WM set A
to 0 to prevent any hangs

[How]
If pstate is not supported, set watermark set A to 0

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
index cd860d3..0ca3c5a 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c
@@ -2313,7 +2313,7 @@ void dcn30_calculate_wm_and_dlg(
                 * calculate DLG based on dummy p-state latency, and max out the set A p-state watermark
                 */
                context->bw_ctx.bw.dcn.watermarks.a = context->bw_ctx.bw.dcn.watermarks.c;
-               context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = 0x13FFFF;
+               context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.pstate_change_ns = 0;
        } else {
                /* Set A:
                 * DCFCLK: Min Required