[ARM] S3C24A0: Serial port definitions and driver support.
authorSandeep Patil <sandeep.patil@azingo.com>
Tue, 21 Oct 2008 13:06:30 +0000 (14:06 +0100)
committerBen Dooks <ben-linux@fluff.org>
Mon, 15 Dec 2008 21:46:36 +0000 (21:46 +0000)
Add serial support for S3C24A0, based on current S3C2410
UART driver. It adds necessary new defines in regs-serial.h
for S3C24A0 and the code to support this device in
drivers/serial/s3c24a0.c

Signed-off-by: Sandeep Patil <sandeep.patil@azingo.com>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
arch/arm/plat-s3c/include/plat/regs-serial.h
drivers/serial/Kconfig
drivers/serial/Makefile
drivers/serial/s3c24a0.c [new file with mode: 0644]
drivers/serial/samsung.c

index a0daa64..18ba31c 100644 (file)
 #define S3C2410_UFSTAT_RXMASK    (15<<0)
 #define S3C2410_UFSTAT_RXSHIFT   (0)
 
+/* UFSTAT S3C24A0 */
+#define S3C24A0_UFSTAT_TXFULL    (1 << 14)
+#define S3C24A0_UFSTAT_RXFULL    (1 << 6)
+#define S3C24A0_UFSTAT_TXMASK    (63 << 8)
+#define S3C24A0_UFSTAT_TXSHIFT   (8)
+#define S3C24A0_UFSTAT_RXMASK    (63)
+#define S3C24A0_UFSTAT_RXSHIFT   (0)
+
 /* UFSTAT S3C2443 same as S3C2440 */
 #define S3C2440_UFSTAT_TXFULL    (1<<14)
 #define S3C2440_UFSTAT_RXFULL    (1<<6)
index 579d63a..f71a2e8 100644 (file)
@@ -508,7 +508,12 @@ config SERIAL_S3C2440
        help
          Serial port support for the Samsung S3C2440 and S3C2442 SoC
 
-
+config SERIAL_S3C24A0
+       tristate "Samsung S3C24A0 Serial port support"
+       depends on SERIAL_SAMSUNG && CPU_S3C24A0
+       default y if CPU_S3C24A0
+       help
+         Serial port support for the Samsung S3C24A0 SoC
 
 config SERIAL_DZ
        bool "DECstation DZ serial driver"
index 0c17c8d..7769aec 100644 (file)
@@ -41,6 +41,7 @@ obj-$(CONFIG_SERIAL_S3C2400) += s3c2400.o
 obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o
 obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o
 obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
+obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
 obj-$(CONFIG_SERIAL_MUX) += mux.o
 obj-$(CONFIG_SERIAL_68328) += 68328serial.o
diff --git a/drivers/serial/s3c24a0.c b/drivers/serial/s3c24a0.c
new file mode 100644 (file)
index 0000000..ebf2fd3
--- /dev/null
@@ -0,0 +1,118 @@
+/* linux/drivers/serial/s3c24a0.c
+ *
+ * Driver for Samsung S3C24A0 SoC onboard UARTs.
+ *
+ * Based on drivers/serial/s3c2410.c
+ *
+ * Author: Sandeep Patil <sandeep.patil@azingo.com>
+ *
+ * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics
+ *     http://armlinux.simtec.co.uk/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+
+#include <mach/hardware.h>
+
+#include <plat/regs-serial.h>
+#include <mach/regs-gpio.h>
+
+#include "samsung.h"
+
+static int s3c24a0_serial_setsource(struct uart_port *port,
+                                   struct s3c24xx_uart_clksrc *clk)
+{
+       unsigned long ucon = rd_regl(port, S3C2410_UCON);
+
+       if (strcmp(clk->name, "uclk") == 0)
+               ucon |= S3C2410_UCON_UCLK;
+       else
+               ucon &= ~S3C2410_UCON_UCLK;
+
+       wr_regl(port, S3C2410_UCON, ucon);
+       return 0;
+}
+
+static int s3c24a0_serial_getsource(struct uart_port *port,
+                                   struct s3c24xx_uart_clksrc *clk)
+{
+       unsigned long ucon = rd_regl(port, S3C2410_UCON);
+
+       clk->divisor = 1;
+       clk->name = (ucon & S3C2410_UCON_UCLK) ? "uclk" : "pclk";
+
+       return 0;
+}
+
+static int s3c24a0_serial_resetport(struct uart_port *port,
+                                   struct s3c2410_uartcfg *cfg)
+{
+       dbg("s3c24a0_serial_resetport: port=%p (%08lx), cfg=%p\n",
+           port, port->mapbase, cfg);
+
+       wr_regl(port, S3C2410_UCON,  cfg->ucon);
+       wr_regl(port, S3C2410_ULCON, cfg->ulcon);
+
+       /* reset both fifos */
+
+       wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
+       wr_regl(port, S3C2410_UFCON, cfg->ufcon);
+
+       return 0;
+}
+
+static struct s3c24xx_uart_info s3c24a0_uart_inf = {
+       .name           = "Samsung S3C24A0 UART",
+       .type           = PORT_S3C2410,
+       .fifosize       = 16,
+       .rx_fifomask    = S3C24A0_UFSTAT_RXMASK,
+       .rx_fifoshift   = S3C24A0_UFSTAT_RXSHIFT,
+       .rx_fifofull    = S3C24A0_UFSTAT_RXFULL,
+       .tx_fifofull    = S3C24A0_UFSTAT_TXFULL,
+       .tx_fifomask    = S3C24A0_UFSTAT_TXMASK,
+       .tx_fifoshift   = S3C24A0_UFSTAT_TXSHIFT,
+       .get_clksrc     = s3c24a0_serial_getsource,
+       .set_clksrc     = s3c24a0_serial_setsource,
+       .reset_port     = s3c24a0_serial_resetport,
+};
+
+static int s3c24a0_serial_probe(struct platform_device *dev)
+{
+       return s3c24xx_serial_probe(dev, &s3c24a0_uart_inf);
+}
+
+static struct platform_driver s3c24a0_serial_drv = {
+       .probe          = s3c24a0_serial_probe,
+       .remove         = s3c24xx_serial_remove,
+       .driver         = {
+               .name   = "s3c24a0-uart",
+               .owner  = THIS_MODULE,
+       },
+};
+
+s3c24xx_console_init(&s3c24a0_serial_drv, &s3c24a0_uart_inf);
+
+static int __init s3c24a0_serial_init(void)
+{
+       return s3c24xx_serial_init(&s3c24a0_serial_drv, &s3c24a0_uart_inf);
+}
+
+static void __exit s3c24a0_serial_exit(void)
+{
+       platform_driver_unregister(&s3c24a0_serial_drv);
+}
+
+module_init(s3c24a0_serial_init);
+module_exit(s3c24a0_serial_exit);
+
index ebeda83..bb8b57a 100644 (file)
@@ -61,7 +61,7 @@
 
 /* we can support 3 uarts, but not always use them */
 
-#ifdef CONFIG_CPU_S3C2400
+#if defined(CONFIG_CPU_S3C2400) || defined(CONFIG_CPU_S3C24A0)
 #define NR_PORTS (2)
 #else
 #define NR_PORTS (3)