net: hns3: add error handling compatibility during initialization
authorJiaran Zhang <zhangjiaran@huawei.com>
Tue, 8 Jun 2021 13:08:31 +0000 (21:08 +0800)
committerDavid S. Miller <davem@davemloft.net>
Tue, 8 Jun 2021 21:43:31 +0000 (14:43 -0700)
During initialization, the driver logs and clears the hw errors that
already occurred. For device supports imp-handle ras capability, it
needs handle different error status, otherwise it may cause wrong reset.

So fix it by adding a new processing branch.

Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

index 0e942d1..bad9fda 100644 (file)
@@ -2152,6 +2152,28 @@ msi_error:
        kfree(desc);
 }
 
+bool hclge_find_error_source(struct hclge_dev *hdev)
+{
+       u32 msix_src_flag, hw_err_src_flag;
+
+       msix_src_flag = hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS) &
+                       HCLGE_VECTOR0_REG_MSIX_MASK;
+
+       hw_err_src_flag = hclge_read_dev(&hdev->hw,
+                                        HCLGE_RAS_PF_OTHER_INT_STS_REG) &
+                         HCLGE_RAS_REG_ERR_MASK;
+
+       return msix_src_flag || hw_err_src_flag;
+}
+
+void hclge_handle_occurred_error(struct hclge_dev *hdev)
+{
+       struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
+
+       if (hclge_find_error_source(hdev))
+               hclge_handle_error_info_log(ae_dev);
+}
+
 static void
 hclge_handle_error_type_reg_log(struct device *dev,
                                struct hclge_mod_err_info *mod_info,
index ce4c96b..07987fb 100644 (file)
@@ -215,6 +215,8 @@ int hclge_config_mac_tnl_int(struct hclge_dev *hdev, bool en);
 int hclge_config_nic_hw_error(struct hclge_dev *hdev, bool state);
 int hclge_config_rocee_ras_interrupt(struct hclge_dev *hdev, bool en);
 void hclge_handle_all_hns_hw_errors(struct hnae3_ae_dev *ae_dev);
+bool hclge_find_error_source(struct hclge_dev *hdev);
+void hclge_handle_occurred_error(struct hclge_dev *hdev);
 pci_ers_result_t hclge_handle_hw_ras_error(struct hnae3_ae_dev *ae_dev);
 int hclge_handle_hw_msix_error(struct hclge_dev *hdev,
                               unsigned long *reset_requests);
index 9ff4210..d960e08 100644 (file)
@@ -4255,18 +4255,11 @@ static void hclge_handle_err_reset_request(struct hclge_dev *hdev)
 
 static void hclge_handle_err_recovery(struct hclge_dev *hdev)
 {
-       u32 mask_val = HCLGE_RAS_REG_NFE_MASK | HCLGE_RAS_REG_ROCEE_ERR_MASK;
        struct hnae3_ae_dev *ae_dev = pci_get_drvdata(hdev->pdev);
-       u32 msix_src_flag, hw_err_src_flag;
 
-       msix_src_flag = hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS) &
-                       HCLGE_VECTOR0_REG_MSIX_MASK;
+       ae_dev->hw_err_reset_req = 0;
 
-       hw_err_src_flag = hclge_read_dev(&hdev->hw,
-                                        HCLGE_RAS_PF_OTHER_INT_STS_REG) &
-                         mask_val;
-
-       if (msix_src_flag || hw_err_src_flag) {
+       if (hclge_find_error_source(hdev)) {
                hclge_handle_error_info_log(ae_dev);
                hclge_handle_mac_tnl(hdev);
        }
@@ -11558,7 +11551,10 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
        hclge_clear_resetting_state(hdev);
 
        /* Log and clear the hw errors those already occurred */
-       hclge_handle_all_hns_hw_errors(ae_dev);
+       if (hnae3_dev_ras_imp_supported(hdev))
+               hclge_handle_occurred_error(hdev);
+       else
+               hclge_handle_all_hns_hw_errors(ae_dev);
 
        /* request delayed reset for the error recovery because an immediate
         * global reset on a PF affecting pending initialization of other PFs
@@ -11911,7 +11907,10 @@ static int hclge_reset_ae_dev(struct hnae3_ae_dev *ae_dev)
        }
 
        /* Log and clear the hw errors those already occurred */
-       hclge_handle_all_hns_hw_errors(ae_dev);
+       if (hnae3_dev_ras_imp_supported(hdev))
+               hclge_handle_occurred_error(hdev);
+       else
+               hclge_handle_all_hns_hw_errors(ae_dev);
 
        /* Re-enable the hw error interrupts because
         * the interrupts get disabled on global reset.