ARM: tegra: apalis-tk1: regulator clean-up
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Sat, 1 Sep 2018 13:04:49 +0000 (15:04 +0200)
committerThierry Reding <treding@nvidia.com>
Wed, 26 Sep 2018 14:50:35 +0000 (16:50 +0200)
Just cosmetic regulator clean-up.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
arch/arm/boot/dts/tegra124-apalis.dtsi

index f645958..13aa8c7 100644 (file)
 
        pcie@1003000 {
                status = "okay";
-               avddio-pex-supply = <&vdd_1v05>;
-               avdd-pex-pll-supply = <&vdd_1v05>;
-               avdd-pll-erefe-supply = <&avdd_1v05>;
-               dvddio-pex-supply = <&vdd_1v05>;
-               hvdd-pex-pll-e-supply = <&reg_3v3>;
-               hvdd-pex-supply = <&reg_3v3>;
-               vddio-pex-ctl-supply = <&reg_3v3>;
+               avddio-pex-supply = <&reg_1v05_vdd>;
+               avdd-pex-pll-supply = <&reg_1v05_vdd>;
+               avdd-pll-erefe-supply = <&reg_1v05_avdd>;
+               dvddio-pex-supply = <&reg_1v05_vdd>;
+               hvdd-pex-pll-e-supply = <&reg_module_3v3>;
+               hvdd-pex-supply = <&reg_module_3v3>;
+               vddio-pex-ctl-supply = <&reg_module_3v3>;
 
                /* Apalis PCIe (additional lane Apalis type specific) */
                pci@1,0 {
@@ -65,7 +65,7 @@
                 * Node left disabled on purpose - the bootloader will enable
                 * it after having set the VPR up
                 */
-               vdd-supply = <&vdd_gpu>;
+               vdd-supply = <&reg_vdd_gpu>;
        };
 
        pinmux: pinmux@70000868 {
                sgtl5000: codec@a {
                        compatible = "fsl,sgtl5000";
                        reg = <0x0a>;
-                       VDDA-supply = <&reg_3v3>;
-                       VDDIO-supply = <&vddio_1v8>;
+                       VDDA-supply = <&reg_module_3v3>;
+                       VDDIO-supply = <&reg_1v8_vddio>;
                        clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
                };
 
                        };
 
                        regulators {
-                               vsup-sd2-supply = <&reg_3v3>;
-                               vsup-sd3-supply = <&reg_3v3>;
-                               vsup-sd4-supply = <&reg_3v3>;
-                               vsup-sd5-supply = <&reg_3v3>;
-                               vin-ldo0-supply = <&vddio_ddr_1v35>;
-                               vin-ldo1-6-supply = <&reg_3v3>;
-                               vin-ldo2-5-7-supply = <&vddio_1v8>;
-                               vin-ldo3-4-supply = <&reg_3v3>;
-                               vin-ldo9-10-supply = <&reg_3v3>;
-                               vin-ldo11-supply = <&reg_3v3>;
-
-                               vdd_cpu: sd0 {
+                               vsup-sd2-supply = <&reg_module_3v3>;
+                               vsup-sd3-supply = <&reg_module_3v3>;
+                               vsup-sd4-supply = <&reg_module_3v3>;
+                               vsup-sd5-supply = <&reg_module_3v3>;
+                               vin-ldo0-supply = <&reg_1v35_vddio_ddr>;
+                               vin-ldo1-6-supply = <&reg_module_3v3>;
+                               vin-ldo2-5-7-supply = <&reg_1v8_vddio>;
+                               vin-ldo3-4-supply = <&reg_module_3v3>;
+                               vin-ldo9-10-supply = <&reg_module_3v3>;
+                               vin-ldo11-supply = <&reg_module_3v3>;
+
+                               reg_vdd_cpu: sd0 {
                                        regulator-name = "+VDD_CPU_AP";
                                        regulator-min-microvolt = <700000>;
                                        regulator-max-microvolt = <1400000>;
                                        ams,ext-control = <1>;
                                };
 
-                               vddio_ddr_1v35: sd2 {
+                               reg_1v35_vddio_ddr: sd2 {
                                        regulator-name =
                                                "+V1.35_VDDIO_DDR(sd2)";
                                        regulator-min-microvolt = <1350000>;
                                        regulator-boot-on;
                                };
 
-                               vdd_1v05: sd4 {
+                               reg_1v05_vdd: sd4 {
                                        regulator-name = "+V1.05";
                                        regulator-min-microvolt = <1050000>;
                                        regulator-max-microvolt = <1050000>;
                                };
 
-                               vddio_1v8: sd5 {
+                               reg_1v8_vddio: sd5 {
                                        regulator-name = "+V1.8";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
                                        regulator-always-on;
                                };
 
-                               vdd_gpu: sd6 {
+                               reg_vdd_gpu: sd6 {
                                        regulator-name = "+VDD_GPU_AP";
                                        regulator-min-microvolt = <650000>;
                                        regulator-max-microvolt = <1200000>;
                                        regulator-always-on;
                                };
 
-                               avdd_1v05: ldo0 {
+                               reg_1v05_avdd: ldo0 {
                                        regulator-name = "+V1.05_AVDD";
                                        regulator-min-microvolt = <1050000>;
                                        regulator-max-microvolt = <1050000>;
        sata@70020000 {
                phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
                phy-names = "sata-0";
-               avdd-supply = <&vdd_1v05>;
-               hvdd-supply = <&reg_3v3>;
-               vddio-supply = <&vdd_1v05>;
+               avdd-supply = <&reg_1v05_vdd>;
+               hvdd-supply = <&reg_module_3v3>;
+               vddio-supply = <&reg_1v05_vdd>;
        };
 
        usb@70090000 {
                       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
                       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
                phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
-               avddio-pex-supply = <&vdd_1v05>;
-               avdd-pll-erefe-supply = <&avdd_1v05>;
-               avdd-pll-utmip-supply = <&vddio_1v8>;
-               avdd-usb-ss-pll-supply = <&vdd_1v05>;
-               avdd-usb-supply = <&reg_3v3>;
-               dvddio-pex-supply = <&vdd_1v05>;
-               hvdd-usb-ss-pll-e-supply = <&reg_3v3>;
-               hvdd-usb-ss-supply = <&reg_3v3>;
+               avddio-pex-supply = <&reg_1v05_vdd>;
+               avdd-pll-erefe-supply = <&reg_1v05_avdd>;
+               avdd-pll-utmip-supply = <&reg_1v8_vddio>;
+               avdd-usb-ss-pll-supply = <&reg_1v05_vdd>;
+               avdd-usb-supply = <&reg_module_3v3>;
+               dvddio-pex-supply = <&reg_1v05_vdd>;
+               hvdd-usb-ss-pll-e-supply = <&reg_module_3v3>;
+               hvdd-usb-ss-supply = <&reg_module_3v3>;
        };
 
        padctl@7009f000 {
        /* CPU DFLL clock */
        clock@70110000 {
                status = "okay";
-               vdd-cpu-supply = <&vdd_cpu>;
+               vdd-cpu-supply = <&reg_vdd_cpu>;
                nvidia,i2c-fs-rate = <400000>;
        };
 
 
        cpus {
                cpu@0 {
-                       vdd-cpu-supply = <&vdd_cpu>;
+                       vdd-cpu-supply = <&reg_vdd_cpu>;
                };
        };
 
                regulator-min-microvolt = <1050000>;
                regulator-max-microvolt = <1050000>;
                gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
-               vin-supply = <&vdd_1v05>;
+               vin-supply = <&reg_1v05_vdd>;
        };
 
        reg_3v3_mxm: regulator-3v3-mxm {
                regulator-boot-on;
        };
 
-       reg_3v3: regulator-3v3 {
+       reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
+               compatible = "regulator-fixed";
+               regulator-name = "+V3.3_AVDD_HDMI";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&reg_1v05_vdd>;
+       };
+
+       reg_module_3v3: regulator-module-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "+V3.3";
                regulator-min-microvolt = <3300000>;
                vin-supply = <&reg_3v3_mxm>;
        };
 
-       reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
-               compatible = "regulator-fixed";
-               regulator-name = "+V3.3_AVDD_HDMI";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               vin-supply = <&vdd_1v05>;
-       };
-
        sound {
                compatible = "toradex,tegra-audio-sgtl5000-apalis_tk1",
                             "nvidia,tegra-audio-sgtl5000";
index 8919213..40c6ca2 100644 (file)
 
        pcie@1003000 {
                status = "okay";
-               avddio-pex-supply = <&vdd_1v05>;
-               avdd-pex-pll-supply = <&vdd_1v05>;
-               avdd-pll-erefe-supply = <&avdd_1v05>;
-               dvddio-pex-supply = <&vdd_1v05>;
-               hvdd-pex-pll-e-supply = <&reg_3v3>;
-               hvdd-pex-supply = <&reg_3v3>;
-               vddio-pex-ctl-supply = <&reg_3v3>;
+               avddio-pex-supply = <&reg_1v05_vdd>;
+               avdd-pex-pll-supply = <&reg_1v05_vdd>;
+               avdd-pll-erefe-supply = <&reg_1v05_avdd>;
+               dvddio-pex-supply = <&reg_1v05_vdd>;
+               hvdd-pex-pll-e-supply = <&reg_module_3v3>;
+               hvdd-pex-supply = <&reg_module_3v3>;
+               vddio-pex-ctl-supply = <&reg_module_3v3>;
 
                /* Apalis PCIe (additional lane Apalis type specific) */
                pci@1,0 {
                 * Node left disabled on purpose - the bootloader will enable
                 * it after having set the VPR up
                 */
-               vdd-supply = <&vdd_gpu>;
+               vdd-supply = <&reg_vdd_gpu>;
        };
 
        pinmux: pinmux@70000868 {
                sgtl5000: codec@a {
                        compatible = "fsl,sgtl5000";
                        reg = <0x0a>;
-                       VDDA-supply = <&reg_3v3>;
-                       VDDIO-supply = <&vddio_1v8>;
+                       VDDA-supply = <&reg_module_3v3>;
+                       VDDIO-supply = <&reg_1v8_vddio>;
                        clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
                };
 
                        };
 
                        regulators {
-                               vsup-sd2-supply = <&reg_3v3>;
-                               vsup-sd3-supply = <&reg_3v3>;
-                               vsup-sd4-supply = <&reg_3v3>;
-                               vsup-sd5-supply = <&reg_3v3>;
-                               vin-ldo0-supply = <&vddio_ddr_1v35>;
-                               vin-ldo1-6-supply = <&reg_3v3>;
-                               vin-ldo2-5-7-supply = <&vddio_1v8>;
-                               vin-ldo3-4-supply = <&reg_3v3>;
-                               vin-ldo9-10-supply = <&reg_3v3>;
-                               vin-ldo11-supply = <&reg_3v3>;
-
-                               vdd_cpu: sd0 {
+                               vsup-sd2-supply = <&reg_module_3v3>;
+                               vsup-sd3-supply = <&reg_module_3v3>;
+                               vsup-sd4-supply = <&reg_module_3v3>;
+                               vsup-sd5-supply = <&reg_module_3v3>;
+                               vin-ldo0-supply = <&reg_1v35_vddio_ddr>;
+                               vin-ldo1-6-supply = <&reg_module_3v3>;
+                               vin-ldo2-5-7-supply = <&reg_1v8_vddio>;
+                               vin-ldo3-4-supply = <&reg_module_3v3>;
+                               vin-ldo9-10-supply = <&reg_module_3v3>;
+                               vin-ldo11-supply = <&reg_module_3v3>;
+
+                               reg_vdd_cpu: sd0 {
                                        regulator-name = "+VDD_CPU_AP";
                                        regulator-min-microvolt = <700000>;
                                        regulator-max-microvolt = <1400000>;
                                        ams,ext-control = <1>;
                                };
 
-                               vddio_ddr_1v35: sd2 {
+                               reg_1v35_vddio_ddr: sd2 {
                                        regulator-name =
                                                "+V1.35_VDDIO_DDR(sd2)";
                                        regulator-min-microvolt = <1350000>;
                                        regulator-boot-on;
                                };
 
-                               vdd_1v05: sd4 {
+                               reg_1v05_vdd: sd4 {
                                        regulator-name = "+V1.05";
                                        regulator-min-microvolt = <1050000>;
                                        regulator-max-microvolt = <1050000>;
                                };
 
-                               vddio_1v8: sd5 {
+                               reg_1v8_vddio: sd5 {
                                        regulator-name = "+V1.8";
                                        regulator-min-microvolt = <1800000>;
                                        regulator-max-microvolt = <1800000>;
                                        regulator-always-on;
                                };
 
-                               vdd_gpu: sd6 {
+                               reg_vdd_gpu: sd6 {
                                        regulator-name = "+VDD_GPU_AP";
                                        regulator-min-microvolt = <650000>;
                                        regulator-max-microvolt = <1200000>;
                                        regulator-always-on;
                                };
 
-                               avdd_1v05: ldo0 {
+                               reg_1v05_avdd: ldo0 {
                                        regulator-name = "+V1.05_AVDD";
                                        regulator-min-microvolt = <1050000>;
                                        regulator-max-microvolt = <1050000>;
        sata@70020000 {
                phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
                phy-names = "sata-0";
-               avdd-supply = <&vdd_1v05>;
-               hvdd-supply = <&reg_3v3>;
-               vddio-supply = <&vdd_1v05>;
+               avdd-supply = <&reg_1v05_vdd>;
+               hvdd-supply = <&reg_module_3v3>;
+               vddio-supply = <&reg_1v05_vdd>;
        };
 
        usb@70090000 {
                       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
                       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
                phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
-               avddio-pex-supply = <&vdd_1v05>;
-               avdd-pll-erefe-supply = <&avdd_1v05>;
-               avdd-pll-utmip-supply = <&vddio_1v8>;
-               avdd-usb-ss-pll-supply = <&vdd_1v05>;
-               avdd-usb-supply = <&reg_3v3>;
-               dvddio-pex-supply = <&vdd_1v05>;
-               hvdd-usb-ss-pll-e-supply = <&reg_3v3>;
-               hvdd-usb-ss-supply = <&reg_3v3>;
+               avddio-pex-supply = <&reg_1v05_vdd>;
+               avdd-pll-erefe-supply = <&reg_1v05_avdd>;
+               avdd-pll-utmip-supply = <&reg_1v8_vddio>;
+               avdd-usb-ss-pll-supply = <&reg_1v05_vdd>;
+               avdd-usb-supply = <&reg_module_3v3>;
+               dvddio-pex-supply = <&reg_1v05_vdd>;
+               hvdd-usb-ss-pll-e-supply = <&reg_module_3v3>;
+               hvdd-usb-ss-supply = <&reg_module_3v3>;
        };
 
        padctl@7009f000 {
        /* CPU DFLL clock */
        clock@70110000 {
                status = "okay";
-               vdd-cpu-supply = <&vdd_cpu>;
+               vdd-cpu-supply = <&reg_vdd_cpu>;
                nvidia,i2c-fs-rate = <400000>;
        };
 
 
        cpus {
                cpu@0 {
-                       vdd-cpu-supply = <&vdd_cpu>;
+                       vdd-cpu-supply = <&reg_vdd_cpu>;
                };
        };
 
                regulator-min-microvolt = <1050000>;
                regulator-max-microvolt = <1050000>;
                gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
-               vin-supply = <&vdd_1v05>;
+               vin-supply = <&reg_1v05_vdd>;
        };
 
        reg_3v3_mxm: regulator-3v3-mxm {
                regulator-boot-on;
        };
 
-       reg_3v3: regulator-3v3 {
+       reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
+               compatible = "regulator-fixed";
+               regulator-name = "+V3.3_AVDD_HDMI";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&reg_1v05_vdd>;
+       };
+
+       reg_module_3v3: regulator-module-3v3 {
                compatible = "regulator-fixed";
                regulator-name = "+V3.3";
                regulator-min-microvolt = <3300000>;
                vin-supply = <&reg_3v3_mxm>;
        };
 
-       reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
-               compatible = "regulator-fixed";
-               regulator-name = "+V3.3_AVDD_HDMI";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-               vin-supply = <&vdd_1v05>;
-       };
-
        sound {
                compatible = "toradex,tegra-audio-sgtl5000-apalis_tk1",
                             "nvidia,tegra-audio-sgtl5000";