arm64: dts: imx8m*-venice: add I2C GPIO bus recovery support
authorTim Harvey <tharvey@gateworks.com>
Wed, 21 Sep 2022 16:46:20 +0000 (09:46 -0700)
committerShawn Guo <shawnguo@kernel.org>
Sun, 23 Oct 2022 12:42:28 +0000 (20:42 +0800)
Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7901.dts
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7903.dts
arch/arm64/boot/dts/freescale/imx8mm-venice-gw7904.dts
arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts

index 66a0d10..c305e32 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        eeprom@52 {
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_uart2: uart2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
index d3ee6fc..826627b 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        pmic@4b {
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        leds_gpio: gpio@20 {
 
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_ksz: kszgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18       0x41
index 31f4c73..0359dca 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
 /* off-board header */
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* off-board header */
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_gpio_leds: gpioledgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21       0x19
index 19f6d29..1ec91c5 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        pmic@4b {
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_gpio_leds: gpioledgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5    0x19
index a67771d..93c9651 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        pmic@4b {
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
 
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gpioled: gpio@27 {
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_pcie0: pciegrp {
                fsl,pins = <
                        MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11     0x41
index dd4302a..187e041 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
 /* off-board header */
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* off-board header */
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_gpio_leds: gpioledgrp {
                fsl,pins = <
                        MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21       0x19
index 06b4c93..ceeca49 100644 (file)
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
 /* off-board header */
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* off-board header */
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14       0x400001c2
+                       MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15       0x400001c2
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL         0x400001c2
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16       0x400001c3
+                       MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17       0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL         0x400001c2
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18       0x400001c3
+                       MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19       0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL         0x400001c2
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20       0x400001c3
+                       MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21       0x400001c3
+               >;
+       };
+
        pinctrl_ksz: kszgrp {
                fsl,pins = <
                        MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29       0x150 /* IRQ# */