arm64: dts: zynqmp: Remove clock-names from GEM in zynqmp-clk-ccf.dtsi
authorMichal Simek <michal.simek@amd.com>
Fri, 9 Dec 2022 13:58:07 +0000 (14:58 +0100)
committerMichal Simek <michal.simek@amd.com>
Thu, 5 Jan 2023 08:53:33 +0000 (09:53 +0100)
Remove clock-names from GEM nodes from clk-ccf because they should be only
present in zynqmp.dtsi. And as is visible both clock-names defined didn't
really match.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/24ce27f91a55ed04ca7ee2ff7db0c674702ef722.1670594284.git.michal.simek@amd.com
arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
arch/arm64/boot/dts/xilinx/zynqmp.dtsi

index e172fa0..3e9979a 100644 (file)
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
                 <&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem1 {
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
                 <&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem2 {
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
                 <&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gem3 {
        clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
                 <&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
                 <&zynqmp_clk GEM_TSU>;
-       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
 };
 
 &gpio {
index 9793a4e..2ff4b78 100644 (file)
                        interrupt-parent = <&gic>;
                        interrupts = <0 57 4>, <0 57 4>;
                        reg = <0x0 0xff0b0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        iommus = <&smmu 0x874>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 59 4>, <0 59 4>;
                        reg = <0x0 0xff0c0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        iommus = <&smmu 0x875>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 61 4>, <0 61 4>;
                        reg = <0x0 0xff0d0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        iommus = <&smmu 0x876>;
                        interrupt-parent = <&gic>;
                        interrupts = <0 63 4>, <0 63 4>;
                        reg = <0x0 0xff0e0000 0x0 0x1000>;
-                       clock-names = "pclk", "hclk", "tx_clk";
+                       clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
                        #address-cells = <1>;
                        #size-cells = <0>;
                        iommus = <&smmu 0x877>;